Technologies for managing data wait barrier operations include starting a receive operation associated with a receive buffer of a compute node that includes a plurality of chunks of data received from a sender compute node. Each of the plurality of chunks of data may be received in an out-of-order sequence relative to an order in which they were transmitted from the sender compute node. The compute node may determine whether a chunk of data in the receive buffer satisfies a condition to be met prior to performing one or more data wait barrier operations to be performed by the compute node to process the chunk of data and, if so, perform a partial computation over the chunk of data.

Methods for providing simultaneous access to a hardware data stream to multiple applications are disclosed. The first application to access a hardware device is responsible for providing and publishing an application programming interface (API) that provides access to the hardware device's data stream, which other applications can then call to gain access to the data stream. In some examples, the first application may be a server process or daemon dedicated to managing the hardware device data stream and publishing the API. In some further examples, the first application may instead may carry out user functionality unrelated to managing the hardware device.

A control method for display switching, an electronic device, and a storage medium are provided. The control method for display switching includes: establishing a first buffer and a second buffer at a kernel layer and initializing the first buffer; establishing a first service process and a second service process at a user layer, and controlling the first service process to render a first image according to a display parameter of a first buffer and transmit it to a display screen via the first buffer for display; and initializing the second buffer according to a switching instruction, and controlling the second service process to render a second image according to a display parameter of the second buffer and transmit it to the display screen via the second buffer so as to make the display screen switch to displaying the second image.

Techniques for identifying and processing graymail are disclosed. An electronic message store is accessed. A determination is made that a first message included in the electronic message store represents graymail, including by accessing a profile associated with an addressee of the first message. A remedial action is taken in response to determining that the first message represents graymail.

Described is a system where memory can be allocated for use by an adapter pre-boot and preserved for use post-boot. A BIOS can allocate for pre-boot hardware operations (e.g., graphics drivers, framebuffers, etc.) and mark this allocated memory as preserved. An indication of the allocated memory can be provided for an OS, such that post-boot, the OS can reclaim and reallocate this memory.

Systems, apparatuses, and methods for performing command buffer gang submission are disclosed. A system includes at least first and second processors and a memory. The first processor (e.g., CPU) generates a command buffer and stores the command buffer in the memory. A mechanism is implemented where a granularity of work provided to the second processor (e.g., GPU) is increased which, in turn, increases the opportunities for parallel work. In gang submission mode, the user-mode driver (UMD) specifies a set of multiple queues and command buffers to execute on those multiple queues, and that work is guaranteed to execute as a single unit from the GPU operating system scheduler point of view. Using gang submission, synchronization between command buffers executing on multiple queues in the same submit is safe. This opens up optimization opportunities for application use (explicit gang submission) and for internal driver use (implicit gang submission).

A system application, such as a cloud tethering subsystem, is instantiated to execute in an embedded environment of a storage system. Errors of the system application that require external support such as memory overflows, daemon errors, etc., are collected and posted using an error reporting system call to an operating system of the storage system in which the virtualized environment is executing. The storage system operating system posts the errors to an error system reporting system as a dial home service request on behalf of the system application. In this manner, the system application can issue dial home service requests without having direct access to the external error resolution system. In some embodiments, a guest operating system utility uses a SCSI mechanism to post errors to the storage system operating system.

Dirty pages of cached user data are persistently stored to page buffers that are allocated from a page buffer pool in a persistent data storage resource of a data storage system, and are indicated by page descriptors that are stored at a head of a temporally ordered page descriptor ring as the dirty pages are stored to the page buffers. The disclosed technology performs a flush operation by selecting a work-set of non-sequential page descriptors within the page descriptor ring, flushing dirty pages from page buffers indicated by the page descriptors in the work-set to non-volatile data storage drives of the data storage system, and storing, for each one of the page buffers indicated by the page descriptors in the work-set, an indication that the page buffer is available for re-use.

A computer's processes and/or threads generate and store in memory, data to reimplement or reverse a transaction on a database, so that the database can be recovered. This data is written to persistent memory storage (“persisted”) by another process, for which the processes and/or threads may wait. This wait includes at least a sleep phase, and additionally a spin phase which is entered if after awakening from sleep and checking (“on-awakening” check), the data to be persisted is found to not have been persisted. To sleep in the sleep phase, each process/thread specifies a sleep duration determined based at least partially on previous results of on-awakening checks. The previous results in which to-be-persisted data was found to be not persisted are indications the sleeps were insufficient, and these indications are counted and used to determine the sleep duration. Repeated determination of sleep duration makes the sleep phase adaptive.

A supervisory control system provides power management in an electronic device by providing timeout periods for a hardware component to lower levels of the operating system such as a power management arbitrator and/or a hardware interface controller. The power management arbitrator and/or hardware interface controller transition at least a portion of a hardware component to a lower-power state based on monitored activity information of the hardware component. The supervisory control system may further provide wakeup periods to the power management arbitrator and/or a hardware interface controller to determine whether the hardware component should be transitioned to a higher-power state at the end of the wakeup period if the hardware component satisfies a transition condition.