Embodiments included herein generally relate to processing data samples. More particularly, embodiments relate to processing a plurality of data samples using a multi-agent ring-buffer and a plurality of agents configured to communicate with the ring-buffer to process each of the plurality of data samples.

Systems, apparatuses, and methods for performing scatter and gather direct memory access (DMA) streaming through a circular buffer are described. A system includes a circular buffer, producer DMA engine, and consumer DMA engine. After the producer DMA engine writes or skips over a given data chunk of a first frame to the buffer, the producer DMA engine sends an updated write pointer to the consumer DMA engine indicating that a data credit has been committed to the buffer and that the data credit is ready to be consumed. After the consumer DMA engine reads or skips over the given data chunk of the first frame from the buffer, the consumer DMA engine sends an updated read pointer to the producer DMA engine indicating that the data credit has been consumed and that space has been freed up in the buffer to be reused by the producer DMA engine.

A data analytics system is disclosed that can include a data repository configured to store data for multiple clients, a metadata repository separate from the data store, an access control system, and a policy store. The data analytics system can automatically generate metadata for data in the data repository using a metadata engine, the metadata including technical metadata and usage metadata, and store the metadata in the metadata repository. The data analytics system can obtain a client policy governing access to the data. The data analytics system can receive a request to provide the data, the request including instructions to create a pipeline to provide the data. The data analytics system can authorize, by the access control system, the request using the policy and usage metadata; create the pipeline using the technical metadata; and provide the data using the pipeline.

In general, this disclosure describes techniques for applying a distributed pipeline model in a distributed computing system to cause processing nodes of the distributed computing system to process data according to a distributed pipeline having an execution topology, specified within a pipeline statement, to perform a task.

An embodiment of an electronic apparatus may comprise one or more substrates, and a controller coupled to the one or more substrates, the controller including circuitry to read utilization-related information for a resource from a memory shared with a processor in response to a request from the processor for the resource, and schedule utilization of the resource based at least in part on the utilization-related information for the resource. Other embodiments are disclosed and claimed.

Examples described herein relate to network layer 7 (L7) offload to an infrastructure processing unit (IPU) for a service mesh. An apparatus described herein includes an IPU comprising an IPU memory to store a routing table for a service mesh, the routing table to map shared memory address spaces of the IPU and a host device executing one or more microservices, wherein the service mesh provides an infrastructure layer for the one or more microservices executing on the host device; and one or more IPU cores communicably coupled to the IPU memory, the one or more IPU cores to: host a network L7 proxy endpoint for the service mesh, and communicate messages between the network L7 proxy endpoint and an L7 interface device of the one or more microservices by copying data between the shared memory address spaces of the IPU and the host device based on the routing table.

An information processing method includes storing, in a memory, a sound signal transmitted from the outside by using a first transmission method in which a bandwidth is guaranteed and timing is restricted, and processing, using a processor, the sound signal stored in the memory upon a predetermined data size of the sound signal being stored in the memory.

In an asynchronous channel based bus architecture enabling decoupled services, there is an asynchronous channel based bus having at least one channel. A first service is coupled to the asynchronous channel based bus, the first service passes messages to and receives messages on the at least one channel. A second service is also coupled to the asynchronous channel based bus, the second service also passes messages to and receive messages on the at least one channel.

Techniques are described herein for managing data structure groups. Such techniques may include providing to a data structure group, by a reader, a plurality of data structure identifiers including a first data structure identifier and a second data structure identifier; mounting, by the data structure group, a first data structure identified by the first data structure identifier and including a first instance identifier; mounting, by the data structure group, a second data structure identified by the second data structure identifier and including a second instance identifier; making a first determination that the first data structure and the second data structure are mounted; making a second determination that the first instance identifier and the second instance identifier match; and marking, based on the first determination and the second determination, the data structure group as ready-to-read.

An input/output store instruction is handled. A data processing system includes a system nest communicatively coupled to at least one input/output bus by an input/output bus controller. The data processing system further includes at least a data processing unit including a core, system firmware and an asynchronous core-nest interface. The data processing unit is communicatively coupled to the system nest via an aggregation buffer. The system nest is configured to asynchronously load from and/or store data to an external device which is communicatively coupled to the input/output bus. The data processing unit is configured to complete the input/output store instruction before an execution of the input/output store instruction in the system nest is completed.