G06F9/545

Formally Verified Trusted Computing Base with Active Security and Policy Enforcement
20230004418 · 2023-01-05 ·

A formally verified trusted computing base with active security and policy enforcement is described. The formally verified trusted computing base includes a formally verified microkernel and multiple formally verified hyper-processes including a virtual machine monitor (VMM), virtual machine introspection (VMI), policy enforcers including an active security policy enforcer (ASPE), and a virtual switch. The active security and policy enforcement continuously monitors for semantic behavior detection or policy violations and enforces the policies at the virtualization layer. Further, policies can be attached to the network layer to provide granular control of the communication of the computing device.

SERVICE MESH ARCHITECTURE FOR INTEGRATION WITH ACCELERATOR SYSTEMS

A processing apparatus can include a memory device having a user space for executing user applications. The processing apparatus can further include infrastructure communication circuitry that can receive a request from a user application executing in the user space. The infrastructure communication circuitry can perform a service mesh operation, in response to the request, without a sidecar proxy. Other systems and methods are described.

SYSTEMS AND METHODS FOR END-TO-END MULTI-AGENT REINFORCEMENT LEARNING ON A GRAPHICS PROCESSING UNIT
20230237352 · 2023-07-27 ·

Embodiments provide a fast multi-agent reinforcement learning (RL) pipeline that runs the full RL workflow end-to-end on a single GPU, using a single store of data for simulation roll-outs, inference, and training. Specifically, simulations and agents in each simulation are run in tandem, taking advantage of the parallel capabilities of the GPU. This way, the costly GPU-CPU communication and copying is significantly reduced, and simulation sampling and learning rates are in turn improved. In this way, a large number of simulations may be concurrently run on the GPU, thus largely improving efficiency of the RL training.

Method for Scheduling Hardware Accelerator and Task Scheduler
20230022294 · 2023-01-26 ·

A task scheduler is connected between a central processing unit (CPU) and each hardware accelerator. The task scheduler first obtains a target task (for example, obtains the target task from a memory), and obtains a dependency relationship between the target task and an associated task. When it is determined, based on the dependency relationship, that a first associated task (for example, a prerequisite for executing the target task is that both a task 1 and a task 2 are executed) in the associated task has been executed, it indicates that the target task meets an execution condition, and the task scheduler schedules related hardware accelerators to execute the target task. Based on a dependency relationship between tasks, the task scheduler schedules, through hardware scheduling, each hardware accelerator to execute each task, and delivery of each task is performed through direct hardware access.

Thread group scheduling for graphics processing

Embodiments are generally directed to thread group scheduling for graphics processing. An embodiment of an apparatus includes a plurality of processors including a plurality of graphics processors to process data; a memory; and one or more caches for storage of data for the plurality of graphics processors, wherein the one or more processors are to schedule a plurality of groups of threads for processing by the plurality of graphics processors, the scheduling of the plurality of groups of threads including the plurality of processors to apply a bias for scheduling the plurality of groups of threads according to a cache locality for the one or more caches.

Hardware offload support for an operating system offload interface using operation code verification
11709716 · 2023-07-25 · ·

A method may include receiving, by a privileged component executed by a processing device, bytecode of a packet processing component from an unprivileged component executed by the processing device, analyzing, by the privileged component, the bytecode of the packet processing component to identify whether the bytecode comprises a first command that returns a redirect, analyzing, by the privileged component, the bytecode of the packet processing component to identify whether the bytecode comprises a second command that returns a runtime computed value, and responsive to determining that the bytecode comprises the first command or the second command, setting a redirect flag maintained by the privileged component.

TECHNIQUES FOR MANAGING CONTAINER-BASED SOFTWARE SERVICES

One embodiment of the present invention sets forth a technique for executing one or more services in a technology stack. The technique includes deploying a first set of containers within an environment, wherein each container included in the first set of containers includes a first service that implements a first interface and a first shim that implements a second interface. The technique also includes transmitting a first request associated with the second interface to a first container included in the first set of containers, wherein the first request is processed by an instance of the first shim and an instance of the first service executing within the first container.

Elastic container platform architecture
11561816 · 2023-01-24 · ·

A method, a device, and a non-transitory storage medium are described in which an elastic platform virtualization service is provided in relation to a virtual device. The elastic platform virtualization service includes logic that provides for the management of a virtualized device during its life cycle. The creation or reconfiguration of the virtualized device is based on a tertiary choice between using dedicated hardware and dedicated kernel; common hardware and common kernel; or a combination of the dedicated hardware, dedicated kernel, common hardware, and common kernel.

RECOMMENDATIONS FOR SCHEDULING JOBS ON DISTRIBUTED COMPUTING DEVICES
20230222000 · 2023-07-13 ·

Methods, systems, and apparatus, including computer programs encoded on computer storage media, for scheduling operations represented as a computational graph on a distributed computing network. A method includes: receiving data representing operations to be executed in order to perform a job on a plurality of hardware accelerators of a plurality of different accelerator types; generating, for the job and from at least the data representing the operations, features that represent a predicted performance for the job on hardware accelerators of the plurality of different accelerator types; generating, from the features, a respective predicted performance metric for the job for each of the plurality of different accelerator types according to a performance objective function; and providing, to a scheduling system, one or more recommendations for scheduling the job on one or more recommended types of hardware accelerators.

LOCATION AGNOSTIC DATA ACCESS

Apparatuses, systems, and techniques to enable a program to access data regardless of where said data is stored. In at least one embodiment, a system enables a program to access data regardless of where said data is stored, based on, for example, one or more locations encoding one or more addresses of said data.