A stuck-at fault mitigation method for resistive random access memory (ReRAM)-based deep learning accelerators, includes: confirming a distorted output value (Y0) due to a stuck-at fault (SAF) by using a correction data set in a pre-trained deep learning network, by means of ReRAM-based deep learning accelerator hardware; updating an average (μ) and a standard deviation (σ) of a batch normalization (BN) layer by using the distorted output value (Y0), by means of the ReRAM-based deep learning accelerator hardware; folding the batch normalization (BN) layer in which the average (μ) and the standard deviation (σ) are updated into a convolution layer or a fully-connected layer, by means of the ReRAM-based deep learning accelerator hardware; and deriving a normal output value (Y1) by using the deep learning network in which the batch normalization (BN) layer is folded, by means of the ReRAM-based deep learning accelerator hardware.

In an embodiment, a system includes a plurality of memory components and a processing device that is operatively coupled with the plurality of memory components. The processing device includes a host interface, an access management component, a media management component (MMC), and an MMC-restart manager that is configured to perform operations including detecting a triggering event for restarting the MMC, and responsively performing MMC-restart operations that include suspending operation of the access management component; determining whether the MMC is operating, and if so then suspending operation of the MMC; resetting the MMC; resuming operation of the MMC; and resuming operation of the access management component.

A method of supervising a complex system includes acquiring and storing failures data and repair resources information regarding the complex system, identifying failure networks and structures of the complex system. Failure types associated with the failure networks of the complex system are determined. The method includes generating a plurality of failure prevention and repair (FPR) sequences, wherein each FPR is associated with the failure networks and the failure types. The generated FPR sequences are analyzed to select a set of FPR sequences and associated repair resources. The method further comprises applying the selected one of the plurality of failure prevention and repair sequences to the complex system, thereby managing the complex system.

A description of a snapshot to be generated is received by a local media controller of a memory device, from a memory sub-system controller. The description comprises a memory address range of a memory device. Responsive to detecting a triggering event, a snapshot of the memory address range of the memory device is generated in view of the description. The snapshot is stored to a destination address. The memory sub-system controller is notified of the triggering event.

Techniques for managing containerized workloads in a container computing environment are disclosed. For example, a method comprises the following steps. The method predicts a composite time delay value for initializing an instance of a containerized workload for executing a microservice within a container computing environment. The method then computes at least one target resource utilization parameter, based on the predicted composite time delay value, for use by the container computing environment.

A training method, an operating method and a memory system are provided. The operating method comprises using a first memory block of the memory system for computation; obtaining an aging condition of the memory system; determining whether the aging condition meets a predetermined aging condition; and when it is determined that the aging condition meets the predetermined aging condition, enabling the second memory block and using the first memory block and the second memory block for computation.

Devices and techniques for managing flash memory are disclosed herein. A memory controller may receive a first program request comprising first host data to be written to the flash memory. The flash memory may comprise a number of storage units with each storage unit comprising a number of storage sub-units. If the first host data is less than a remainder threshold, the memory controller may generate a first program data unit comprising the first host data and first log data describing the flash memory. The memory controller may program the program data unit to the first storage unit of the flash memory, where the first log data is written to a first storage sub-unit of the number of storage sub-unit. The memory controller may also store an indication that the first storage sub-unit is invalid.

Read operations can be performed to read data stored at a data block. Parameters reflective of a separation between a pair of programming distributions associated with the data block can be determined based on the plurality of read operations. A read request to read the data stored at the data block can be received. In response to receiving the read request, a read operation can be performed to read the data stored at the data block based on the parameters that are reflective of the separation between the pair of programming distributions associated with the data block.

A memory system and a data processing system including the memory system may manage a plurality of memory devices. For example, the data processing system may categorize and analyze error information from the memory devices, acquire characteristic data from the memory devices and set operation modes of the memory devices based on the characteristic data, allocate the memory devices to a host workload, detect a defective memory device among the memory devices and efficiently recover the defective memory device.

Embodiments of the present disclosure relate to a method, an electronic device, and a computer program product for memory fault prediction. In a method for memory fault prediction provided by the embodiments of the present disclosure, an accuracy of fault prediction over a past period of time is obtained, each fault prediction is made based on a comparison of a prediction confidence with a confidence threshold, and the accuracy indicates an amount of work to reconstruct and diagnose predicted faulty memories after the fault prediction; the confidence threshold is adjusted in response to the accuracy being less than an accuracy threshold; a detection rate of the fault prediction over the past period of time is obtained; and the confidence threshold is adjusted reversely in response to the detection rate being less than a detection rate threshold. In this way, the reliability of memories in nodes is guaranteed while reducing unnecessary reconstructions and diagnoses.