A processor comprises a plurality of processing units, wherein there is a fixed transmission time for transmitting a message from a sending processing unit to a receiving processing unit, based on the physical positions of the sending and receiving processing units in the processor. The processing units are arranged in a column, and the fixed transmission time depends on the position of a processing circuit in the column. An exchange fabric is provided for exchanging messages between sending and receiving processing units, the columns being arranged with respect to the exchange fabric such that the fixed transmission time depends on the distances of the processing circuits with respect to the exchange fabric.

Embodiments of information handling systems (IHSs) and computer-implemented methods are provided herein for testing system memory (or another volatile memory component) of an IHS. In the disclosed embodiments, memory testing is performed automatically: (a) during the pre-boot phase each time a new page of memory is allocated for the first time after a system boot, and (b) during OS runtime each time a read command is received and/or an event is detected. By proactively testing each page of memory, as the page is allocated but before information is stored therein, the systems and methods disclosed herein prevent “bad” memory pages from being used.

Systems, apparatuses and methods may provide for technology that detects a successful boot of a first firmware component in a computing system, receives a signal from a second firmware component in the computing system, and detects an incompatibility of the first firmware component with respect to the second firmware component based on the signal. In one example, only the first firmware component is repaired in response to the incompatibility.

Provided are a computer program product, system, and method for using a machine learning module to determine when to perform error checking of a storage unit. Input on attributes of at least one storage device comprising the storage unit are provided to a machine learning module to produce an output value. An error check frequency is determined from the output value. A determination is made as to whether the error check frequency indicates to perform an error checking operation with respect to the storage unit. The error checking operation is performed in response to determining that the error checking frequency indicates to perform the error checking operation.

Embodiments disclosed herein relate to methods, systems, and computer programs for verifying that data incorporated into a computer program is current. The methods, systems, and computer programs compare a source identifier status code associated with the data to a current source identifier status code at the location where the data was obtained. The methods, systems, and computer programs include at least one validation function which determines the validity of the data according to selected parameters. If the source identifier status code and current source identifier status code match and the at least one validation function determines the data is valid, an executable computer program incorporating the data and one or more functions is produced as output.

A device for processing bit strings of a program flow including a data memory and an interface that is designed to output a second bit string, and a bit string manipulator that is designed to analyze the first bit string at a predetermined bit string section for information that indicates a target state of the program flow, and to manipulate the first bit string in the bit string section to obtain the second bit string.

An electronic control device includes a rewritable configuration memory composed of a plurality of frames in which logic circuit information is stored, a reconfiguration control unit configured to rewrite the logic circuit information of the frames, a logic unit configured to form a logic circuit based on the logic circuit information stored in the frames, and a configuration memory diagnosis unit configured to read the logical circuit information stored in the frames of the configuration memory and to perform error detection which is detection of an error in the stored logic circuit information, in which when the frames are rewritten by the reconfiguration control unit, the configuration memory diagnosis unit performs the error detection of ones of the frames that are rewritten prior to ones of the frames that are not rewritten.

A data storage device including a non-volatile memory and a micro-controller is provided. The non-volatile memory includes a first block and a second block, wherein the first block stores firmware code. The micro-controller writes one predetermined string into the second block before an execution of the firmware code, and determines whether there is more than one predetermined string in the second block. In response to there being no more than one predetermined string in the second block, the micro-controller allows the execution of the firmware code and erases the predetermined string in the second block upon successful completion of a prerequisite procedure during the execution of the firmware code. In response to there being more than one predetermined string in the second block, the micro-controller does not allow the execution of the firmware code.

Systems and methods are disclosed for categorizing error types encountered in data access operations based on bit information from a data segment. An example apparatus includes a circuit configured to perform error recovery for one or more data segments including determining an error recovery operation of a plurality of error recovery operations to perform based on bit information of the one or more data segments. The example circuit also performs the determined error recovery operation.

Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for implementing a zero knowledge prover are disclosed. In one aspect, a method includes the actions of executing a software program. The method further includes storing an execution trace that includes, for each address in memory, a value at each clock cycle during execution of the software program. The method further includes generating a sorted execution trace by sorting the execution trace. The method further includes determining a constraint for given values in the memory at adjacent clock cycles. The method further includes determining whether the sorted execution trace complies with the constraint and whether the sorted execution trace is a permutation of the execution trace. The method further includes providing, for output, data indicating whether the software program executed correctly while preventing outputting data included in the execution trace or the sorted execution trace.