An apparatus to facilitate scalable runtime validation for on-device design rule checks is disclosed. The apparatus includes a memory to store a contention set, one or more multiplexors, and a validator communicably coupled to the memory. In one implementation, the validator is to: receive design rule information for the one or more multiplexers, the design rule information referencing the contention set; analyze, using the design rule information, a user bitstream against the contention set at a programming time of the apparatus, the user bitstream for programming the one or more multiplexors; and provide an error indication responsive to identifying a match between the user bitstream and the contention set.

Systems and methods are disclosed for checker cores for fault tolerant processing. For example, an integrated circuit (e.g., a processor) for executing instructions includes a processor core configured to execute instructions of an instruction set; an outer memory system configured to store instructions and data; and a checker core configured to receive committed instruction packets from the processor core and check the committed instruction packets for errors, wherein the checker core is configured to utilize a memory pathway of the processor core to access the outer memory system by receiving instructions and data read from the outer memory system as portions of committed instruction packets from the processor core. For example, data flow from the processor core to the checker core may be limited to committed instruction packets received via dedicated a wire bundle.

Apparatuses and methods for anomaly detection. In one embodiment, a method is implemented in a computing device for building a tree structure to represent a system behavior includes obtaining one or more training log records; and building a tree structure using the one or more training log records. The tree structure includes a plurality of tree nodes. Each successive tree node in a root-to-leaf path of the tree structure representing successive log elements of the one or more training log records. Each of the one or more training log records includes one or more log elements. In one embodiment, a method implemented in a computing device for fault detection includes obtaining a live log record and determining an anomaly in the live log record by comparing corresponding successive elements of the live log record to successive nodes in a root-to-leaf direction of the tree structure.

A system and method for monitoring a code overwrite error of a Redriver chip are disclosed. An analog to digital converter (ADC) monitors whether an EEPROM code of a Redriver chip has been overwritten in error. A Switch chip is utilized to separate the Redriver chip from a system management bus (SMbus) controller. A pull-up resistor keeps an SMbus at a Redriver chip/EEPROM side in a pull-up state. The ADC is utilized to monitor the SMbus. When an abnormal low level is monitored, an alarm signal is sent to the SMbus controller to give a risk alarm for an overwrite error. In addition, according to different ADC sampling rates, an SMbus may also be connected between the SMbus controller and an ADC with a high sampling rate, whereby SMbus data can be monitored.

An information handling system includes a first memory and a baseboard management controller. The first memory stores a first firmware partition and a second firmware partition. The baseboard management controller includes a second memory. The baseboard management controller begins execution of a DM-Verity daemon, and performs periodic patrol reads of the first firmware partition. The baseboard management controller detects one or more block failures in the first firmware partition, and stores information associated with the one or more block failures in a message box of the second memory. In response to the entire first firmware partition being scanned, the baseboard management controller switches a boot partition from the first firmware partition to the second firmware partition, and initiates a reboot of the information handling system.

Various aspects of the disclosure relate to test automation systems with pre-compilers to validate various steps associated with a test script. An artificial intelligence (AI)-based pre-compiler may use natural language processing (NLP) to validate various steps associated with a test script associated with an application. Other aspects of this disclosure relate to automated encryption and mocking of test input data associated with test scripts.

Various embodiments comprise systems and methods to maintain data consistency in a data pipeline. In some examples, a computing system comprises data monitoring circuitry that monitors the operations of the data pipeline. The data pipeline receives input data, processes the input data, and generates output data. The data monitoring circuitry receives and processes the output data sets to identify changes between the output data sets. The data monitoring circuitry generates a consistency score based on the changes that indicates a similarity level between the output data sets. The data monitoring circuitry determines when the consistency score exceeds a threshold value. When the consistency score exceeds the threshold value, the data monitoring circuitry generates and transfers an alert that indicates ones of the output data sets that exceeded the threshold value.

A storage controller has an operating system (OS) and power control firmware configured to manage use of battery power during a power outage event. The OS specifies to the power control firmware first and second sets of physical components that should be shed by power control firmware during a two-phase vault process. Upon a power failure, the power control firmware turns off power to the first set of physical components and notifies the OS of the power failure. The OS determines whether to abort or continue the vault process. If the OS aborts the vault process, the power control firmware restores power to the first set of physical components. If the OS continues the vault process, the power control firmware turns off power to the second set of physical components, the OS saves application state, and moves all data from volatile memory to persistent memory.

An illustrative method includes detecting, by a cloud based storage system services provider based on a problem signature, that a storage system has experienced a problem that is associated with the problem signature; and deploying, without user intervention, one or more corrective measures that modify the storage system to resolve the problem.

An input/output store instruction is handled. A data processing system includes a system nest coupled to at least one input/output bus by an input/output bus controller. The data processing system further includes at least a data processing unit including a core, system firmware and an asynchronous core-nest interface. The data processing unit is coupled to the system nest via an aggregation buffer. The system nest is configured to asynchronously load from and/or store data to at least one external device which is coupled to the at least one input/output bus. The data processing unit is configured to complete the input/output store instruction before an execution of the input/output store instruction in the system nest is completed. The asynchronous core-nest interface includes an input/output status array with multiple input/output status buffers. The system firmware includes a retry buffer and the core includes an analysis and retry logic.