A graphics processing system for performing tile-based rendering of a scene that includes safety-critical elements. The graphics processing system includes a geometry engine configured to, in a geometry processing phase, identify protected tiles that include safety-critical elements; a fragment processing engine configured to, in a fragment processing phase, process each of the protected tiles first and second times so as to, respectively, generate first and second fragment-processed outputs; and a check unit configured to, for each of the protected tiles, compare the first and second fragment-processed outputs and raise a fault signal if the first and second fragment-processed outputs do not match.

A multi-core processor having a first operation mode in which processors perform the same task and a second operation mode in which the processors perform different tasks includes first and second processors configured to write an operation mode value to a first register or second register when a function called in executed software requests the first or second operation mode, a manager configured to assign core IDs of the first and second processors according to the operation mode value stored in the first register or second register, and a reset controller configured to reset the first and second processors in response to the function, wherein the manager assigns the same core ID to the first and second processors when the operation mode value indicates the first operation mode, and allocates different core IDs to the first and second processors when the operation mode value indicates the second operation mode.

A system includes a central processing unit (CPU), a first input/output (I/O) module, and a second I/O module. The first I/O module includes a first module health controller operatively connected to the CPU. The second I/O module includes a second module health controller operatively connected to the first module health controller and the CPU. One of the first module health controller and the second module health controller is configured to assert a paired module health signal to the CPU indicating that the first I/O module and the second I/O module are health.

The invention present disclosure relates to a control device for redundant execution of an operating function, wherein the control device comprises at least a first processor unit and a second processor unit and a plurality of peripheral units and a first switching unit is provided for the first processor unit and a second switching unit is provided for the second processor unit, and wherein the control device is designed in a first operating mode to execute the operating function by means of the first processor unit and in the meantime to execute a predetermined auxiliary function by means of the second processor unit. According to the invention, the control device is designed, in a second operating mode to execute the operating function by means of the second processor unit, and in so doing to continue to execute the auxiliary function (24) in a predefined reduced scope by means of the second processor unit, wherein a coupling device is provided, which is designed to connect the second processor unit to the first switching unit.

The invention relates to a system (1), comprising at least two asynchronous computers (2-i), on each of which at least one application (A) is executed, which provides control data (SD) for at least one actuation system (3), wherein the provided control data (SD) are transmitted by a control-authorized computer (2-i) that assumes a master computer status (M-RS) to the actuation system (3) for the control thereof, wherein the computers (2-i) of the system (1) cyclically exchange state data (ZD) and performance data (LD) with each other by means of a data interface in a data exchange (DAS), wherein the computers (2-i) each determine, on the basis of the state and performance data (ZD.sub.opp, LD.sub.opp) received from other computers (2-j) and on the basis of the computer's own state and performance data (ZD.sub.own, LD.sub.own, in a master/slave selection (MSA) performed on the computer (2-i), a computer status (RS) as a control-authorized or non-control-authorized computer (2-i) to be assumed by the particular computer (2-i) itself.

A method for validating incoming data to a computer system is provided. The method receives the incoming data, simultaneously, by the computer system and a mirror computer system, wherein the computer system is separate and distinct from the mirror computer system, wherein the computer system lacks a communication connection to the mirror computer system, and wherein the mirror computer system lacks a communication connection to the computer system; processes the incoming data by the mirror computer system, to produce output; and when the output comprises an acceptable result, processes the incoming data by the computer system.

The present disclosure provides an intelligent roadside unit. The intelligent roadside unit includes: a radar configured to detect an obstacle within a first preset range of the intelligent roadside unit; a camera configured to capture an image of a second preset range of the intelligent roadside unit; a master processor coupled to the radar and the camera, and configured to generate a point cloud image according to information on the obstacle detected by the radar and the image detected by the camera; and a slave processor coupled to the radar and the camera, and configured to generate a point cloud image according to the information on the obstacle detected by the radar and the image detected by the camera, in which the slave processor checks the master processor, and when the original master processor breaks down, it is switched from the master processor to the slave processor.

Embodiments relate generally to a scalable, modularized mechanism which allows for storing programmable data streams on chip and provides repeatable on-demand issuances of data streams to one or more targeted instruments. In some embodiments, multiple data streams are grouped into data stream schedules to perform a series of programmable operations on demand. In these and other embodiments, data stream schedules can be reused and further grouped into data stream plans that can be executed in any order upon request or are hard-coded in a specific order.

A safety-relevant computer system, in particular a railway safety system, contains at least two hardware channels. A memory check results of the channels are fed to at least one comparator, which triggers an error response if the memory check results are not equal. In order to be able to use diverse software programs created by compilers, memory check results of the diverse software programs of each channel are fed to the comparator. The memory check results of a first software program of the first and second channels are compared with each other and the memory check results of a second software program of the first and second channels are compared with each other.

Methods, systems and apparatuses may provide for technology that includes a chip having a first die including a first processing logic to execute a first application instance and generate a first output of the first application instance, and a second processing logic to execute a second application instance and generate a second output of the second application instance. The chip may also include a second die coupled to the first die, wherein the second die includes a safety monitor detect a condition associated with one or more of an error in the first output, an error in the second output, or a discrepancy between the first output and the second output. The safety monitor may also initiate a transition of the chip into a safe state in response to the condition.