Disclosed herein are related to an age detector for determining an age of a memory block, and a method of operation of the age detector. In one configuration, a memory system includes a memory block and an age detector coupled to the memory block. In one aspect, the memory block generates a first set of data in response to a first power on, and generates a second set of data in response to a second power on. In one configuration, the age detector includes a storage block to store the first set of data from the memory block, and inconsistency detector to compare the first set of data and the second set of data. In one configuration, the age detector includes a controller to determine an age of the memory block, based on the comparison.

To identify slice errors, a processing module of a computing device in a dispersed storage network (DSN) sends first list digest requests to at least first and second dispersed storage (DS) units. The requests indicates a first range of slice names to include in a first list digest. The processing module receives digest responses from the DS units, and compares the digest responses to determine whether they identify the same slices. If they do not identify the same slices, the processing module sends second list digest requests indicating a sub-range of the first range of slice names to include in second list digests. The sub-range continues to be narrowed until the processing module identifies at least one sub-range of slice names where a slice error exists.

Apparatuses, systems, and methods related to determination of a match between data values stored by three or more arrays are described. A system using the data values may manage performance of functions, including automated functions critical for prevention of damage to a product, personnel safety, and/or reliable operation, based on whether the data values match. For instance, one apparatus described herein includes a plurality of arrays of memory cells formed on a single memory chip. The apparatus further includes comparator circuitry configured to compare data values stored by three arrays selected from the plurality to determine whether there is a match between the data values stored by the three arrays. The apparatus further includes an output component configured to output data values of one of two arrays of the three arrays responsive to determination of the match between the data values stored by the two arrays.

Disclosed herein are related to an age detector for determining an age of a memory block, and a method of operation of the age detector. In one configuration, a memory system includes a memory block and an age detector coupled to the memory block. In one aspect, the memory block generates a first set of data in response to a first power on, and generates a second set of data in response to a second power on. In one configuration, the age detector includes a storage block to store the first set of data from the memory block, and inconsistency detector to compare the first set of data and the second set of data. In one configuration, the age detector includes a controller to determine an age of the memory block, based on the comparison.

The disclosure provides a data processing device and method. The data processing device may include: a task configuration information storage unit and a task queue configuration unit. The task configuration information storage unit is configured to store configuration information of tasks. The task queue configuration unit is configured to configure a task queue according to the configuration information stored in the task configuration information storage unit. According to the disclosure, a task queue may be configured according to the configuration information.

A circuit and method for verifying the operation of error checking circuitry. In one example, a circuit includes a memory, a first error checking circuit, a second error checking circuit, and a comparison circuit. The memory includes a data output. The first error checking circuit includes an input and an output. The input of the first error checking circuit is coupled to the data output of the memory. The second error checking circuit includes an input and an output. The input of the second error checking circuit is coupled to the data output of the memory. The comparison circuit includes a first input and a second input. The first input is coupled to the output of the first error checking circuit. The second input is coupled to the output of the second error checking circuit.

A method includes identifying multiple apportionments, where each apportionment identifies numbers of bit copies to be stored in at least one memory for at least some bits of a data value. The method also includes, for each apportionment, estimating a numerical error associated with use of the apportionment with a specified function, where the numerical error is estimated by creating errors in bit copies of multiple data values processed using the specified function. The method further includes combining portions of different ones of the apportionments having lower estimated numerical errors to create multiple derived apportionments. The method also includes, for each derived apportionment, estimating a numerical error associated with use of the derived apportionment with the specified function. In addition, the method includes selecting a final apportionment for use with the specified function, where the final apportionment includes or is based on at least one of the derived apportionments.

In a method for computer-assisted operation of a memory unit, data is saved in the memory unit and the data is encoded before saving, or data is retrieved from the memory unit and the data is decoded after retrieval. For first-time encoding of the data, at least one group of application data sets, containing data segments having identical application data for an application program and check data segments having different diversity characteristic data respectively, is generated or selected from a supply of possible diversity characteristic data. Each application data set is encoded and saved. The data is retrieved in that the application data sets are retrieved and decoded. Data is saved in that the application data sets are encoded and saved. Furthermore, a method for computer-assisted, repeated execution of an application program in redundant computing instances, a computer program product and a provision apparatus are disclosed.

A memory cell array unit according to an embodiment of the present disclosure includes a memory cell array and a microcontroller. The memory cell array includes an n-bit allocation bit allocated from a memory controller in read/write control, and a redundant bit of one or a plurality of bits not being provided with a switching mechanism that switches as a substitution for a portion of the allocation bit. The microcontroller reads and writes n-bit data from and into the memory cell array using the allocation bit and the redundant bit on the basis of the read/write control from the memory controller.

Methods and devices for writing or for checking a controller of a vehicle are provided. A first set of vehicle parameters are written into the controller of the vehicle as coding parameters. A second set of vehicle parameters are written in another controller of the vehicle coupled to the controller via a vehicle bus of the vehicle. The first set of vehicle parameters are compared with the second set of vehicle parameters. An error is detected based on the comparing. The vehicle is not started in response to the detected error.