Embodiments enable a database management system (DBMS) to manage two levels of disk failure groups. These two levels of redundancy are achieved by grouping the disks of the disk group for the DBMS into two levels of failure groups (i.e., data sites each containing two or more failure groups of disks). This system of disk grouping allows a DBMS to potentially tolerate the loss of both an entire first site and part of a second site. Such a DBMS uses a multi-level voting system, based on both failure group-level votes and site-level votes, to identify the current version of administrative data structures (ADS) that store key administrative data. In addition to data sites that store database data, the DBMS includes a quorum site with a single quorum failure group that stores a copy of the ADS. The quorum site contributes a site-level vote during a multi-level voting event.

Representative embodiments disclose a consistent, low latency, reliable storage system that uses quorum logic. An odd number of storage nodes are selected to store data for a client application. The odd number allows a quorum to be determined. When data is written to the storage nodes, success is identified if the data is successfully written to a majority of the storage nodes. Similarly, when a read is performed, success is identified if the majority of the storage nodes return the same value written in the same write operation. This is determined by matching a value and a version number for each node. Additional data is written to the storage nodes along with the values to allow the system to identify and repair inconsistencies in the data. In some embodiments, both the current data and prior data are stored to aid in repairing inconsistent data.

A method for checking calculation results in a system including multiple processing units including receiving a data frame from one of the processing units, the data frame includes an application identification and a number of comparison values of the processing unit, the comparison values of the processing unit are sorted into a buffer memory on the basis of the application identification, it is checked whether the buffer memory under the application identification contains the comparison values of all processing units, and if the comparison values are completely present, the comparison values are compared.

A logic design may include control and datapath circuitry. The datapath circuitry may be implemented in a double modular redundancy arrangement that generates respective first and second data signals. The control circuitry may be implemented in a triple modular redundancy arrangement. Storage circuitry may be used to buffer the first and second data signals. Real-time error detection circuitry may perform real-time error detection operations on the first and second data signals. Background error checking circuitry may perform background error checking operations such as cyclic redundancy check calculations on configuration data. In response to an error detected by the real-time error detection circuitry, the circuitry may select between the buffered first and second data signals to produce the output data signal. The selection may be performed based on the background error checking operations and may be delayed relative to the real-time detection of the error.

A data management system including a plurality of servers each having a processor, a memory, and a storage device, the system receiving and storing data using the plurality of servers and multiplexing the data, wherein the servers are provided with: a first determination unit that determines the consistency of the multiplexed data; a second determination unit that has a greater number of allowable server failures than the first determination unit for determining the consistency of the multiplexed data but a greater minimum number of times of server-to-sever communications for determining the consistency of the data; a combination unit that receives a data consistency determination result from the first determination unit or the second determination unit, and that, if the determination result includes consistency guaranteeing data, outputs the consistency guaranteed data; and a data storage unit that stores the data output by the combination unit.

An apparatus and method for controlling and debugging hardware lockstep mis-compares. For example, one embodiment of a processor comprises: a plurality of processing elements operable in a redundancy mode, the plurality of processing elements to each execute a same plurality of instructions and produce a corresponding plurality of result signals; comparator circuitry to compare corresponding result signals of the plurality of result signals, the comparator circuitry to generate one or more failure indications when a first one or more result signals produced by a first processing element are different from a corresponding second one or more result signals produced by a second processing element; and masking circuitry to mask a first failure indication of the one or more failure indications when a corresponding mask bit of a mask matrix is set to a first value.

Embodiments described herein relate to an IMD operating in a backup mode in a manner that mitigates against adverse effects of a memory failure. The IMD includes a NVM that stores backup mode firmware, a RAM that includes multiple separate RAM blocks, a processor, and a counter. The processor executes the backup mode firmware to operate the IMD in accordance with a backup mode in response to detection of a malfunction that when detected should cause the IMD to operate in accordance with the backup mode. While the processor operates the IMD in accordance with the backup mode the processor stores and accesses variables in one of the RAM blocks. The counter is selectively incremented and used to select which one of the RAM blocks the variables are stored within while the processor executes the backup mode firmware to operate the IMD in accordance with the backup mode.