Using a framing protocol, an application specific integrated circuit (ASIC) in an emulation system may transmit a start-of-packet molecule to a serializer-deserializer (SerDes) interface of a switching ASIC in a gap cycle leading up to an emulation cycle such that the switching ASIC may start routing mission data through the SerDes interface during the emulation cycle. The ASIC may transmit an end-of-packet molecule at a first gap cycle to the SerDes interface of the switching ASIC such that the switching ASIC may stop routing data through the SerDes interface during the gap cycles. The start-of-packet molecule may include a start-of-packet word, a status word, cyclic redundancy check word, and an idle word. The end-of-packet molecule may include an end-of-packet word, a status word, a cyclic redundancy check word, and an idle word.

An automatic robot control system and methods relating thereto are described. These systems include components such as a touch screen panel (“TSP”) robot controller for controlling a TSP robot, a camera robot controller for controlling a camera robot and an audio robot controller for controlling an audio robot. The TSP robot operates inside a TSP testing subsystem, the camera robot operates inside a camera testing subsystem, and the audio robot operates inside an audio testing subsystem. Inside the audio testing subsystem, an audio signals measurement system, using a bi-directional coupling, controls the operation of the audio robot controller. In this control scheme, a test application controller is designed to control the different types of subsystem robots. Methods relating to TSP, camera, and audio robots, and their controllers, taken individually or in combination, for automatic testing of device functionalities are also described.

Embodiments provide a scheduler for scheduling test times of a plurality of tester software environments for an automatic test equipment. The scheduler is configured to automatically assign test times to the plurality of tester software environments, to acquire test instructions from a tester software environment of the plurality of tester software environments to which a current test time is assigned, to control the automatic test equipment to perform a test according to the test instructions in order to obtain test results, and to provide the test results to the tester software environment of the plurality of tester software environments to which the current test time is assigned.

A test information management device manages test information relating to a test carried out by receiving a test signal output from a first device in a second device. The test information management device includes a linker configured to link together first information including information representing an output state of the test signal in the first device and second information including image information representing reception results of the test signal in the second device using at least one of identification information for identifying the first device or the second device and times at which the first information and the second information are generated.

An electronic control unit (ECU) is tested by an automated D-bus testing tool in a first device. The test tool establishes one or more secure shells between the first device and the ECU. The tool reads test input data from an Excel input file. The ECU comprises a software stack including a test client, a Bluetooth middle layer and a hardware abstraction layer, that communicate internally relative to the ECU, via a D-bus. The test tool sends function calls and parameters via the secure shells to the ECU to test execution of Bluetooth functions and/or Bluetooth profiles. The function calls enable simulation of a human machine interface by the test client. The tool monitors API call returns and logs D-bus communications via the one or more secure shells. The test tool outputs test verdict information and/or D-bus communication logs as text in an Excel file.

Disclosed is a test bench (1) for testing equipment (2), in particular a computer. The test bench includes: at least one programmable macro-instrument (12), a set of measurement and generation instruments (14), and a set of charges (15), switchable with one another. Also disclosed is a computer program for using such a bench (1).

According to an embodiment, an information processing device includes a processor. The processor is configured to: execute a rewriting process to rewrite some of a plurality of factors, included in data for normal operation of a target device, into a value different from a normal value; execute a correction process that is performed in a course of generating test data to be used for a test of the target device; and determine a method of generating the test data based on a rewriting part that indicates a factor serving as a target of the rewriting process and based on a correction part that indicates a factor serving as a target of the correction process.

The present disclosure discloses a test method and an electronic device. The method includes: displaying a test interface including controls of a plurality of test actions in response to a test request for a target terminal, and obtaining a control of a target test action selected by a user from the controls of the plurality of test actions; matching operations of respective application objects on the target terminal with the control of the target test action, obtaining a plurality of candidate application objects successfully matched with the control of the target test action, and displaying identification information of the plurality of candidate application objects on the test interface; and obtaining a target identifier selected by the user from the identification information of the plurality of candidate application objects, and controlling a target application object corresponding to the target identifier to perform the target test action for testing.

A system to implement debugging for a multi-threaded processor is provided. The system includes a hardware thread scheduler configured to schedule processing of data, and a plurality of schedulers, each configured to schedule a given pipeline for processing instructions. The system further includes a debug control configured to control at least one of the plurality of schedulers to halt, step, or resume the given pipeline of the at least one of the plurality of schedulers for the data to enable debugging thereof. The system further includes a plurality of hardware accelerators configured to implement a series of tasks in accordance with a schedule provided by a respective scheduler in accordance with a command from the debug control. Each of the plurality of hardware accelerators is coupled to at least one of the plurality of schedulers to execute the instructions for the given pipeline and to a shared memory.

In various examples, one or more components or regions of a processing unit—such as a processing core, and/or component thereof—may be tested for faults during deployment in the field. To perform testing while in deployment, the state of a component subject to test may be retrieved and/or stored during the test to maintain state integrity, the component may be clamped to communicatively isolate the component from other components of the processing unit, a test vector may be applied to the component, and the output of the component may be compared against an expected output to determine if any faults are present. The state of the component may be restored after testing, and the clamp removed, thereby returning the component to its operating state without a perceivable detriment to operation of the processing unit in deployment.