The disclosure describes techniques for a self-test of a graphics processing unit (GPU) independent of instructions from another processing device. The GPU may perform the self-test in response to a determination that the GPU enters an idle mode. The self-test may be based on information indicating a safety level, where the safety level indicates how many faults in circuits or memory blocks of the GPU need to be detected.

Techniques for automatically selecting device tests for testing devices configured for operation in wireless communication networks, based upon maintenance releases (MRs) received from original equipment manufacturers. When an MR with changes for a device is received, the MR may be analyzed in order to determine what the changes pertain to with respect to the device. The changes may be clustered with respect to requirements for the changes and a knowledge base may be consulted by a recommendation engine in order to determine candidate tests for testing the MR. The candidate tests may be based upon previous tests, failed tests and, relevant tests. Based at least in part on the identified previous tests, failed tests and relevant tests, one or more tests may be selected for testing devices with respect to the newly received MR.

Techniques for automatically selecting device tests for testing devices configured for operation in wireless communication networks, based upon maintenance releases (MRs) received from original equipment manufacturers. When an MR with changes for a device is received, the MR may be analyzed in order to determine what the changes pertain to with respect to the device. The changes may be clustered with respect to requirements for the changes and a knowledge base may be consulted by a recommendation engine in order to determine candidate tests for testing the MR. The candidate tests may be based upon previous tests, failed tests and, relevant tests. Based at least in part on the identified previous tests, failed tests and relevant tests, one or more tests may be selected for testing devices with respect to the newly received MR.

In product testing, a script prioritization tool (102) is used to intelligently prioritize the execution sequence of test scripts. This tool creates a repository of test outputs from the executions of test scripts and analyzes the outputs to train and deploy a machine learning, ML, model that defines the priority of the scripts that may need to be executed and the scripts whose execution may be skipped without affecting the quality of testing. Scripts that are more likely to fail and/or are time consuming to execute are prioritized, while other scripts may be skipped. The ML model ranks the scripts based on the average execution time of the script, a count of the execution failures of the script, a count of the number of execution retries for the script, and the most recent failure time of the script. The scripts can be executed based on their rankings for efficiency and time-saving.

In product testing, a script prioritization tool (102) is used to intelligently prioritize the execution sequence of test scripts. This tool creates a repository of test outputs from the executions of test scripts and analyzes the outputs to train and deploy a machine learning, ML, model that defines the priority of the scripts that may need to be executed and the scripts whose execution may be skipped without affecting the quality of testing. Scripts that are more likely to fail and/or are time consuming to execute are prioritized, while other scripts may be skipped. The ML model ranks the scripts based on the average execution time of the script, a count of the execution failures of the script, a count of the number of execution retries for the script, and the most recent failure time of the script. The scripts can be executed based on their rankings for efficiency and time-saving.

A method for testing a data-transferring arrangement includes (c) acquiring a channel output-side data set, (d)(e) evaluating the channel output-side data set to determine an error distribution and a bit error ratio in the channel output-side data set, (f) determining at least one test subsequence, (g) forming a further test data set with at least the determined test subsequence, (h) applying the further test data set to the data-transferring arrangement, (i) acquiring a present channel output-side data set based on the further test data set, (j)(k) evaluating the present channel output-side data set to determine a present error distribution and to determine a present bit error ratio in the present channel output-side data set, comparing the present bit error ratio with a predetermined threshold value and, if the comparison reveals that the bit error ratio is larger than the predetermined threshold value, repeatedly carrying out steps (f) to (k).

A method for testing a data-transferring arrangement includes (c) acquiring a channel output-side data set, (d)(e) evaluating the channel output-side data set to determine an error distribution and a bit error ratio in the channel output-side data set, (f) determining at least one test subsequence, (g) forming a further test data set with at least the determined test subsequence, (h) applying the further test data set to the data-transferring arrangement, (i) acquiring a present channel output-side data set based on the further test data set, (j)(k) evaluating the present channel output-side data set to determine a present error distribution and to determine a present bit error ratio in the present channel output-side data set, comparing the present bit error ratio with a predetermined threshold value and, if the comparison reveals that the bit error ratio is larger than the predetermined threshold value, repeatedly carrying out steps (f) to (k).

An electronic circuit includes a clock signal generator configured to deliver a clock signal. A propagation circuit is configured to propagate the clock signal on a plurality of propagation branches. A number of timers are coupled to at least some of the branches. The timers are clocked by corresponding replicas of the clock signal and configured to generate a pulse signal every N pulses of the corresponding replica of the clock signal. A comparator is configured to generate an alarm signal having a first state when two of the pulse signals are phase-offset with respect to one another.

An electronic circuit includes a clock signal generator configured to deliver a clock signal. A propagation circuit is configured to propagate the clock signal on a plurality of propagation branches. A number of timers are coupled to at least some of the branches. The timers are clocked by corresponding replicas of the clock signal and configured to generate a pulse signal every N pulses of the corresponding replica of the clock signal. A comparator is configured to generate an alarm signal having a first state when two of the pulse signals are phase-offset with respect to one another.

Methods, apparatus, systems, and articles of manufacture are disclosed to debug a hardware accelerator such as a neural network accelerator for executing Artificial Intelligence computational workloads. An example apparatus includes a core with a core input and a core output to execute executable code based on a machine-learning model to generate a data output based on a data input, and debug circuitry coupled to the core. The debug circuitry is configured to detect a breakpoint associated with the machine-learning model, compile executable code based on at least one of the machine-learning model or the breakpoint. In response to the triggering of the breakpoint, the debug circuitry is to stop the execution of the executable code and output data such as the data input, data output and the breakpoint for debugging the hardware accelerator.