G06F11/3075

Hierarchical Power Management Architecture for SoC-based Electronic Devices
20220413582 · 2022-12-29 ·

An electronic system has a plurality of power domains, and each domain includes a subset of one or more processor clusters, first memory, PMIC, and second memory. A plurality of power sensors are distributed on the electronic system and configured to collect a plurality of power samples from the power domains. A power management engine is configured to process the power samples based on locations of the corresponding power sensors to generate one or more power profiles and a plurality of power throttling thresholds. The power manage engine is configured to implement a global power control operation by determining power budgets of the power domains on a firmware level and enabling operations of the power domains accordingly. The power manage engine is also configured to enable a plurality of local power control operations to be directly implemented on the power domains based on the power throttling thresholds.

Electronic apparatus and method of controlling the same
11537491 · 2022-12-27 · ·

The disclosure relates to an electronic apparatus and a method of controlling the same. The electronic apparatus includes: a communication interface; and a processor configured to receive log data of a plurality of devices connected to a network through the communication interface, acquire operation time information of each of the devices from the received log data, calculate similarity of the operation time between the plurality of devices based on the acquired operation time information, and determine a device group including two or more devices with relatively high calculated similarity among the plurality of devices.

Application topology graph for representing instrumented and uninstrumented objects in a microservices-based architecture

A method of rendering a graphical user interface (GUI) comprising an application topology graph for a microservice architecture comprises generating a plurality of traces from a first plurality of spans generated by instrumented services in the architecture and generating generate a second plurality of spans for uninstrumented services using information extracted from the first plurality of spans. The method further comprises grouping the second plurality of spans with the plurality of traces. Subsequently, the method comprises traversing the traces and collecting a plurality of span pairs from the plurality of traces, wherein each pair of the span pairs is associated with a call between two services. The method also comprises aggregating information across the plurality of span pairs to reduce duplicative information associated with multiple occurrences of a same span pair from the plurality of span pairs. Finally, the method comprises rendering the application topology graph using the aggregated information.

METHOD, ELECTRONIC DEVICE, AND COMPUTER PROGRAM PRODUCT FOR DATA PROCESSING
20220405184 · 2022-12-22 ·

Embodiments of the present disclosure provide a method, an electronic device, and a computer program product for data processing. The method described herein includes determining identification information for an operation, wherein the identification information includes at least one field indicating content of the operation and a field indicating a unique identification of the operation. The method further includes identifying, based on the identification information, log entries for the operation in log files for at least one microservice invoked by the operation. The method further includes determining a log for the operation, wherein the log includes the identified log entries. With the solution for data processing of the present application, it is possible to easily acquire logs for an operation using identification information that includes a field indicating the content of the operation, so as to facilitate targeted analysis of the operation based on the content of the operation.

ERROR RATE MEASURING APPARATUS AND ERROR RATE MEASURING METHOD
20220398177 · 2022-12-15 ·

An error rate measuring apparatus detects a bit error of input data returned from a device under test with transmission of a test signal at an error detector, and includes a log recording unit that records log data of state transition of each lane by handshakes of a plurality of lanes in a predetermined communication standard with respect to the device under test in making the device under test transit to a state of LOOPBACK, and a display unit that displays the recorded log data of the state transition of each lane in a time-series order.

Memory leak detection using real-time memory growth pattern analysis

The disclosure describes techniques that enable detection of memory leaks of software executing on devices within a computer network. An example network device includes memory and processing circuitry. The processing circuitry monitors a usage of the memory by a software component operating within the network device. The processing circuitry periodically determines a memory growth pattern score for the software component based on the usage of the memory. The processing circuitry also predicts whether the user-level process is experiencing a memory leak based on the memory growth pattern score. The processing circuitry applies confirmation criteria to current memory usage of the software component to confirm that the software component is experiencing the memory leak. When the software component is experiencing the memory leak, the processing circuitry generates an alert.

GENERATING FAULT CONDITIONS USING A FAULT-ENABLED SOFTWARE DEVELOPMENT KIT

Systems and methods are provided for automatically generating a fault-enabled software development kit (SDK) to test an application. The generating includes determining one or more faults based on codes associated with the SDK and a frequency of occurrences of faults while executing the SDK. A fault injector automatically injects the determined faults in select layers of code in the SDK and generates fault configuration data associated with the automatically injected faults in the SDK. The fault configuration data describes faults that have been injected in the fault-enabled SDK to test an application. The fault-enabled SDK tests the application without needs for modifying the application code for testing purposes. The fault-enabled SDK further provides types of faults that may be common in using the SDK without requiring application developers to have detailed understanding of internals of the SDK to test the application with simulated faults.

TECHNIQUES FOR PROVIDING INCREMENTAL BACKUP PROGRESS INDICATIONS
20220391289 · 2022-12-08 ·

The described embodiments set forth techniques for providing an improved backup progress estimate for a backup of a source file system volume (FSV). The techniques involve determining, for the source FSV, a backup size during performance of backup operations. The operations can include determining the backup size based on a number of files on the source FSV. Additionally, the operations can include copying files of the source FSV and/or propagating corresponding files of a destination FSV to a location of the backup of the source FSV on a destination storage device and updating one or more metrics using a number of files and/or a number of bytes copied and/or propagated to the backup. In this manner, a progress indication for the backup may be determined based on the one or more metrics responsive to files and/or directories of the source file system volume being stored on a destination storage device.

METHOD AND COMPUTING DEVICE FOR GENERATING ACTION HISTORY DATA OF APPLICATION AND COMPUTER-READABLE NON-TRANSITORY RECORDING MEDIUM
20220382660 · 2022-12-01 ·

A method of generating action history data of an application according to an embodiment of the present disclosure is performed by a computing device. The method includes acquiring a first log generated by an application, acquiring a second log generated by a database (DB), matching application log entries included in the first log to DB log entries included in the second log, and generating action history data about actions performed by the application on the basis of a result of the matching.

Memory anomaly detection method and device

A method includes obtaining a first memory log, where the first memory log includes log information of a plurality of garbage collections, and log information of each garbage collection includes a garbage collection time, and includes at least one of a downtime, memory usage after garbage collection, and memory usage before garbage collection, obtaining, based on log information in a first detection time window, first statistical information corresponding to the first detection time window, and determining, based on the first statistical information corresponding to the first detection time window, an anomaly degree corresponding to the log information in the first detection time window.