Secure circuitry detects a latency between when an interrupt occurred and when the interrupt was released in correspondence with handling of the interrupt. The secure circuitry detects an interval between consecutive occurrences of the interrupt. In response to either or both of the latency exceeding a latency limit and the interval exceeding an interval limit, the secure circuitry performs an action.

This disclosure relates to an electronic device. The electronic device includes a non-transitory storage device, one or more peripherals, wherein the one or more peripherals are disabled, a processor configured to transmit a request to enable a peripheral of the one or more peripherals, and a power reset manager module. The power reset manager module is configured to receive the request to enable the peripheral. The power reset manager module includes a first memory configured to store, in response to the received request, an indication that peripheral was enabled. The processor is further configured to copy contents of the first memory to the non-transitory storage device and output the indication that the peripheral was enabled as a part of an update procedure.

A power management integrated circuit (PMIC) capable of operating, in memory systems, as a master control in power management in some situations and operating as a slave control in power management in other situations. For example, when used in a memory system operating on a SATA bus, the PMIC assumes the master control by monitoring the bus signals for entering or existing a sleep mode or a power shutdown mode, communicating to the controller of the memory system to prepare for the respective mode, and when ready, adjusting power states for the mode changes. For example, when used in a memory system operating on a PCIe bus, the PMIC assumes the slave control during a normal mode and a sleep mode, but the master control when the memory system is in a power disable mode in which the controller of the memory system is powered off.

Multiple data paths may be available to a data management system for transferring data between a primary storage device and a secondary storage device. The data management system may be able to gain operational advantages by performing load balancing across the multiple data paths. The system may use application layer characteristics of the data for transferring from a primary storage to a backup storage during data backup operation, and correspondingly from a secondary or backup storage system to a primary storage system during restoration.

Systems and techniques for automated transfer of peripheral device operations are described herein. In an example, a system may adapted so that, while a first device of a first type and a second device of the first type are simultaneously connected to a client device, the first device, rather than the second device, is used as an active device of the first type for at least one application, the first and second devices being peripheral devices. The system may be further adapted so that, while both the first and second devices remain connected to the client device, a switch from the first device to the second device by a user is determined, and, based on the switch from the first device to the second device, the second device, rather than the first device, is used as the active device of the first type for the at least one application.

Described are advanced communication computers that include a processor, at least one network adaptor connected to the processor, wherein the at least one network adaptor comprises a separate processor, at least one remote network connected to the at least one network adaptor, and at least one remote server connected to the at least one remote network. The processor is configured to identify an expected performance level of the at least one network adaptor, collect actual performance data from the at least one processor, and compare the actual performance data to the expected performance level to identify issues with signal condition, network traffic, interference, and other similar metrics.

Embodiments of a device and method to automatically acquire signal quality metrics in a digital communication system are disclosed. The device may include acquisition means to sample the likelihood of a digital communication signal passing through a grid of time and amplitude regions, and storage means by which such likelihood measurements may be accumulated in a computer memory array for analysis. A state machine may execute a method that controls both the acquisition means and the storage means, requiring minimal intervention from supervisory systems.

A system for monitoring inter-integrated circuit (12C) communication includes a power supply, a battery backup unit, an 12C serial clock line (SCL) coupled between the power supply and the battery backup unit, an 12C serial data line (SDA) coupled between the power supply and the battery backup unit, and a controller. A first monitor line is coupled between the controller and the 12C serial clock line, and a second monitor line is coupled between the controller and the 12C serial data line. The controller is configured to monitor a digital communication transmitted on the 12C serial clock and data lines between the power supply and the battery backup unit, interpret a message included in the monitored digital communication, and perform a control function according to the interpreted message.

A communications link between a computing device and an external device is monitored. A driver for the communications link is executed on the computing device. The driver is configured to monitor data traffic over the communications link. Data indicative of the monitored data traffic is received from the driver. The data is sent to an analysis function configured to identify a condition of the communications link based on accumulated data indicative of the data traffic. Data indicative of an identified condition of the communications link is received from the analytics function. An indication of the identified condition is rendered on a display device of the computing device.

A device comprising: a bus forming a ring path for circulation of one or more data packets around the bus, wherein the one or more data packets comprises a trace report packet for collecting trace data from a plurality of components attached to the bus, wherein the bus is configured to repeatedly circulate the trace report packet with a fixed time period taken for each circulation of the ring path performed by the trace report packet; and the plurality of components, each of which comprises circuitry configured to, upon reception of the trace report packet at the respective component, insert one or more items of the trace data that have been obtained by the respective component.