The invention discloses a remote software debugging method for embedded terminals, making it possible to reduce additional hardware dependencies and storage space occupation based on a CoreSight debugging framework and a dynamic command system. Series communication is used as a lead study to reduce the pre-exploration difficulty of complex communication modules and facilitate subsequent extraction of the commonalities of the communication modules. An FPB unit in CoreSight debugging framework provides a basis for setting and responding to breakpoints, debugging information for the breakpoints can be extracted and output by means of debug monitoring exceptions, and dynamic commands are used as carriers of overall functions to fulfill rich debugging functions such as starting and exiting of a debugging mode, setting and cancelling of breakpoints and control over program running state. Finally, common elements of communication modules are extracted, and a general method for adaptive software debugging of communication modules is provided.

Embodiments of the present invention relate to the field of computer technologies. The embodiments of the present invention provide a debugging method, including: stopping running, by a core A of a multi-core processor, and sending a running stop signal to other cores in a process of stopping running; after receiving a first stop termination instruction and resuming running, executing a debugging information collection function and stopping running after completing the execution of the debugging information collection function; after receiving a second stop termination instruction and resuming running, sending a running resumption instruction to the other cores; and knocking a pending breakpoint in a process of running an operation object of the preset event, so as to enter a debugging state. According to the technical solutions provided in the embodiments of the present invention, kernel mode code and user mode code can be debugged on a same debugging platform.

An apparatus includes an event message generator configured to generate an event message. The apparatus further includes a filter circuit configured to receive the event message and to send a first portion of the event message to a destination device. The filter circuit is further configured to selectively send a second portion of the event message to the destination device at least partially based on an event traffic load associated with the destination device.

The present disclosure describes systems and methods for controlling access to secure debugging and profiling features of a computer system. Some illustrative embodiments include a system that includes a processor, and a memory coupled to the processor (the memory used to store information and an attribute associated with the stored information). At least one bit of the attribute determines a security level, selected from a plurality of security levels, of the stored information associated with the attribute. Asserting at least one other bit of the attribute enables exportation of the stored information from the computer system if the security level of the stored information is higher than at least one other security level of the plurality of security levels.

A debug work is performed with respect to states after execution of a plurality of commands which is collectively issued from a processor to an arithmetic processing apparatus. A command register group holds commands issued from the processor in respective registers with a command chain including a plurality of commands as a unit. A command processing section processes the commands supplied from the command register group. A state machine manages processing states of the commands in the command processing section. A control section previously sets a condition under which stop is to be performed in the command chain as a stop condition and causes to stop the processing in the command processing section on the basis of the previously set stop condition and the processing states managed in the state machine.

Systems and methods for secure testing and debugging of electronic devices are described. In one embodiment, the systems and methods may include an electronic device that includes a control switch placed on a device test bus of the electronic device between a debugger external to the device and a debug interface on the device. In some cases, the device may include at least one register placed on the device test bus between the debugger and authentication logic of the electronic device.

A real-time debugger implementation maintains and manages multiple debug contexts allowing developers to interact with real-time applications without breaking the system in which the debug application is executing. The debugger allows multiple debug contexts to exist and allows break points in real-time and non-real-time code portions of one or more applications executing on a debug enabled core of a processor. A debug monitor function may be implemented as a hardware logic module on the same integrated circuit as the processor. Higher priority interrupt service requests may be serviced while otherwise maintaining a context for the debug session (e.g., stopped at a developer defined breakpoint). Accordingly, the application developer executing the debugger may not have to be concerned with processing occurring on the processor that may be unrelated to the current debug session.

A real-time debugger implementation maintains and manages multiple debug contexts allowing developers to interact with real-time applications without breaking the system in which the debug application is executing. The debugger allows multiple debug contexts to exist and allows break points in real-time and non-real-time code portions of one or more applications executing on a debug enabled core of a processor. A debug monitor function may be implemented as a hardware logic module on the same integrated circuit as the processor. Higher priority interrupt service requests may be serviced while otherwise maintaining a context for the debug session (e.g., stopped at a developer defined breakpoint). Accordingly, the application developer executing the debugger may not have to be concerned with processing occurring on the processor that may be unrelated to the current debug session.

A real-time debugger implementation maintains and manages multiple debug contexts allowing developers to interact with real-time applications without breaking the system in which the debug application is executing. The debugger allows multiple debug contexts to exist and allows break points in real-time and non-real-time code portions of one or more applications executing on a debug enabled core of a processor. A debug monitor function may be implemented as a hardware logic module on the same integrated circuit as the processor. Higher priority interrupt service requests may be serviced while otherwise maintaining a context for the debug session (e.g., stopped at a developer defined breakpoint). Accordingly, the application developer executing the debugger may not have to be concerned with processing occurring on the processor that may be unrelated to the current debug session.

This disclosure provides techniques for debugging a computing system in a post-silicon validation process. In one example, a system can include a memory storing a set of instructions. The system can include a controller configured to fetch and execute the set of instructions. The system can include a logic block. The system can include a control bus coupling the memory, the controller, and the logic block. The control bus can include a first break-in circuit and a second break-in circuit each coupled to the controller. The first break-in circuit and the second break-in circuit can be configured to selectively cascade a break point from the controller through the logic block to halt execution of the set of instructions.