G06F11/3656

METHOD FOR BLOCKING EXTERNAL DEBUGGER APPLICATION FROM ANALYSING CODE OF SOFTWARE PROGRAM
20260023675 · 2026-01-22 · ·

A method for blocking external debugger application from analysing code of software program installed on computing device. The method including initializing software program including an application program and an internal debugger application. The software program, upon initialization thereof, instructs internal debugger application to load application program in internal debugger application. The internal debugger application is configured to utilize kernel resources of an operating system of the computing device. The method includes executing internal debugger application to set one or more break-points in code of application program to define execution path for code of application program, executing application program as per defined execution path for code thereof, stopping execution of code of application program upon reaching any of one or more break-points therein, and handing control to internal debugger application to provide an address for next instruction to be executed in defined execution path for code of application program.

Host-device interface for debug authentication

An electronic device includes a debug port providing a communications interface for debugging purposes, a plurality of processing unit access ports, an authentication interface circuit configured to authenticate the external device, and a further access port coupled between the debug port and the authentication interface circuit. The further access port is configured to be in an open state in which communications are relayed between the debug port and the authentication interface circuit. The authentication interface circuit has registers including a status register capable of being read by the external device via the debug port and the further access port, the status register being configured to store an indication of the open or closed state of each of the processing unit access ports.

Debug data communication system for multiple chips

An apparatus comprises a first semiconductor chip comprising a first communication controller to receive first debug data from a second semiconductor chip; a memory to store the first debug data from the second semiconductor chip and second debug data of the first semiconductor chip; and a second communication controller to transmit the first debug data from the second semiconductor chip and the second debug data of the first semiconductor chip to an output port of the first semiconductor chip.

Data communication using optical UART links
12579045 · 2026-03-17 · ·

This application is directed to communicating telemetry and debugging data of a memory system using optical signals. An enclosed memory device has an optical indicator and receives a data request. In response to the data request, the enclosed memory device obtains internal activity data stored in the memory device, encodes the internal activity data into an electrical signal, and drives the optical indicator with the electrical signal to generate a visible light signal carrying the internal activity data. In some embodiments, the enclosed memory device includes a solid-state drive. In some embodiments, the internal activity data includes telemetry data stored by the enclosed memory device while the memory device is processing a sequence of memory access requests including at least one of a read request and a write request.