A distributed storage system node is disclosed. The distributed storage system node may include at least one storage device, which may act as the primary replica for data subject to an Input/Output (I/O) request. A cost analyzer may calculate a local estimated time required to complete the I/O request at the primary replica, and a remote estimated time required to complete the I/O request at a secondary replica of the data. An I/O redirector may direct the I/O request to either the primary replica or the secondary replica based on the local estimated time required and the one remote estimated time required.

A method for cleaning up a background application, a storage medium, and an electronic device are provided. The method includes the following. Collect multi-dimensional feature information associated with an application as samples to construct a sample set associated with the application. Extract feature information from the sample set to construct multiple training sets. Train each training set to generate a corresponding decision tree. Predict, with multiple decision trees generated, current feature information associated with the application and output multiple predicted results when the application is switched to the background, where the predicted results include predicted results indicative of that the application is able to be cleaned up and predicted results indicative of that the application is unable to be cleaned up. Determine whether the application is able to be cleaned up according to the multiple predicted results. Clean up the application when the application can be cleaned up.

Memory circuits including dynamically configurable cache cells are disclosed herein. The cache cells may be selectively and dynamically configured to select one or more bits per cell according to a real-time determination or characterization of a workload type.

A storage device includes a controller and nonvolatile memories. The controller receives write commands having virtual stream identifiers (IDs), receives discard commands having the virtual stream IDs, and determines a lifetime of write data to which each of the virtual stream IDs is assigned. The nonvolatile memories are accessed by the controller depending on physical stream IDs. The controller maps the virtual stream IDs and the physical stream IDs based on the lifetime of the write data.

A priority for each operating requirement of a set of operating requirements of a memory sub-system can be determined. A programming operation setting for a programming operation to be performed at the memory sub-system can be determined based on the priority for each operating requirement. A request to perform the programming operation at the memory sub-system can be received. Responsive to receiving the request to perform the programming operation, the programming operation can be performed at the memory sub-system based on the programming operation setting.

Techniques for using erasure coding across multiple regions to reduce the likelihood of losing objects in a cloud object storage platform are provided. In one set of embodiments, a computer system can upload each of a plurality of data objects to each of a plurality of regions of the cloud object storage platform. The computer system can further compute a parity object based on the plurality of data objects, where the parity object encodes parity information for the plurality of data objects. The computer system can then upload the parity object to another region of the cloud object storage platform different from the plurality of regions.

Methods, systems, techniques, and devices for smart factory reset procedures are described. In accordance with examples as disclosed herein, a memory system may receive one or more commands associated with a reset procedure. The memory system may identify, in response to the one or more commands, a first portion of one or more memory arrays of the memory system as storing user data and a second portion of the one or more memory arrays as storing data associated with an operating system. The memory system may update a mapping of the memory system based on identifying the first portion and the second portion. The memory system may transfer the data associated with the operating system to a third portion of the one or more memory arrays and perform an erase operation on a subset of physical addresses of the set of physical addresses.

The present application provides a data communication method, a communication system and a computer-readable storage medium. The method comprises: acquiring, by a data production module, target data to be sent to a data consumption module; determining in a preset GPU shared memory, by the data production module, a target memory block into which the target data is to be written, wherein the GPU shared memory is a predetermined GPU memory for data communication between the data production module and the data consumption module; writing, by the data production module, the target data into the target memory block to obtain memory address information corresponding to the target data; and sending, by the data production module, the memory address information to the data consumption module so that the data consumption module is operable to access the target data based on the memory address information.

A storage control system manages a utilization of data blocks of a storage volume which is partitioned into data blocks having a unique block identifier (ID) and a same block size. The storage control system receives data items and assigns a respective unique data ID to each data item, which include consecutive data IDs. The data items are written to a free data block as a whole, and a record for the written data block is inserted into a node of a first tree structure. The record includes the unique block ID of the written data block, a first data ID of the data items, and a bitmap which maps the consecutive data IDs of the data items in the written data block, starting from the first data ID, to a respective bit whose value indicates whether the data item associated with the data ID is valid or invalid.

A device includes a host including a main memory, and semiconductor memory including a nonvolatile semiconductor memory, memory unit, and controller. The nonvolatile semiconductor memory stores first address information. The memory unit stores second address information as part of the first address information. The controller accesses the nonvolatile semiconductor memory based on the second address information. Third address information is stored in the main memory, and is part or all of the first address information. The controller uses the third address information when accessing the nonvolatile semiconductor memory if address information to be referred is not stored in the second address information.