A device, method and system is directed to fast data storage on a block storage device. New data is linearly written to an empty write block. A location of the new data is tracked. Meta data associated with the new data is linearly written. A lookup table may be updated based in part on the meta data. The new data may be read based the lookup table configured to map a logical address to a physical address.

When access to a second data block located in a second storage area occurs immediately after access to a first data block located in a first storage area, a data allocation control apparatus updates access information indicating an access sequence of the data blocks, based on identification information of the first data block and identification information of the second data block. The data allocation control apparatus determines whether to perform relocation of a first data group related to the first data block and a second data group related to the second data block, based on the access information and allocation information indicating an allocation status of the data blocks in the first storage area and the second storage area.

Efficient processing of user data read requests in a deduplicated data storage system places the metadata for most frequently requested data in data structures and locations in the system hierarchy where the metadata will be most rapidly available. The total amount of such metadata makes storing all of the metadata in high speed memory expensive, and the system and method described uses both the temporal and the spatial characteristics of the user system activity in any epoch to adjust the contents of metadata cache so as to respond to the dynamics of a multi user or multi-application environment where the storage system is not made aware of the time changing mix of operations except by observation of the individual requests. A history record is used to promote metadata from the slow memory to the fast memory, and a process selection may be adjusted based on the address-space activity.

A method and a system for managing memories in a storage system. In one embodiment of the present invention, there is provided a method for managing memories in a storage system comprising a first controller and a second controller. The method comprising: receiving an allocation request from a second controller in the storage system, where the allocation request requires to allocate available storage spaces from a first memory in the storage system to a second memory in the storage system for use by the second controller; and determining a candidate number of available storage spaces to be allocated from the first memory to the second memory based on first use status of the first memory, wherein the first memory and the second memory are associated with the first controller and the second controller respectively, and the first memory and the second memory are mirrored memories.

A method and a system for managing memories in a storage system. In one embodiment of the present invention, there is provided a method for managing memories in a storage system comprising a first controller and a second controller. The method comprising: receiving an allocation request from a second controller in the storage system, where the allocation request requires to allocate available storage spaces from a first memory in the storage system to a second memory in the storage system for use by the second controller; and determining a candidate number of available storage spaces to be allocated from the first memory to the second memory based on first use status of the first memory, wherein the first memory and the second memory are associated with the first controller and the second controller respectively, and the first memory and the second memory are mirrored memories.

A storage apparatus includes: a first storage device that stores data; a proxy storage processor that records first data in the first storage device in a power-off state of a second storage device, while a writing destination of the first data is the second storage device, and moves the first data to the second storage device after the second power storage is powered on, while the first data is recorded in the first storage device; and a cache releaser that deletes the first data from a cache memory after the proxy storage processor stores the first data in the second storage device, while the first data is recorded in the first storage device, so that it is possible to efficiently use the cache memory.

A storage apparatus includes: a first storage device that stores data; a proxy storage processor that records first data in the first storage device in a power-off state of a second storage device, while a writing destination of the first data is the second storage device, and moves the first data to the second storage device after the second power storage is powered on, while the first data is recorded in the first storage device; and a cache releaser that deletes the first data from a cache memory after the proxy storage processor stores the first data in the second storage device, while the first data is recorded in the first storage device, so that it is possible to efficiently use the cache memory.

There is described a storage controller, the storage controller having an array of entries, each entry associated with a partition of one or more partitions, wherein the controller comprises logic configured to identify a partition identifier of an entry and apply a policy to the entry based on or in response to the partition identifier.

There is described a storage controller, the storage controller having an array of entries, each entry associated with a partition of one or more partitions, wherein the controller comprises logic configured to identify a partition identifier of an entry and apply a policy to the entry based on or in response to the partition identifier.

A processing system includes a cache that includes a cache lines that are partitioned into a first subset of the cache lines and a second subsets of the cache lines. The processing system also includes one or more counters that are associated with the second subsets of the cache lines. The processing system further includes a processor configured to modify the one or more counters in response to a cache hit or a cache miss associated with the second subsets. The one or more counters are modified by an amount determined by one or more characteristics of a memory access request that generated the cache hit or the cache miss.