In one embodiment, a processor comprises: a first configuration register to store a pointer to a process address space identifier (PASID) table; and an execution circuit coupled to the first configuration register. The execution circuit, in response to a first instruction, is to obtain command data from a first location identified in a source operand of the first instruction, obtain a PASID table handle from the command data, access a first entry of the PASID table using the pointer from the first configuration register and the PASID table handle to obtain a PASID value, insert the PASID value into the command data, and send the command data to a device coupled to the processor. Other embodiments are described and claimed.

A memory device includes an input/output circuit configured to receive a status read command from a memory controller, a toggle counter configured to count a number of toggles of a signal received from the memory controller, and a status register configured to store status information of the memory device and configured to output the status information to the input/output circuit. The memory device also includes a status output controller configured to determine whether the number of toggles counted by the toggle counter corresponds to a reference number of toggles and configured to control the status register to transmit the status information to the memory controller through the input/output circuit, in response to the status read command.

A method for the initial programming of a secondary computer. The method includes configuring a serial interprocessor interface between the secondary computer and a main computer, and data are written via the interface to a flash memory of the secondary computer.

A universal peripheral extender architecture, system, and method is disclosed that addresses the need of communicatively connecting peripheral I/O devices and the smart host devices in legacy, medical, and industrial applications. As disclosed, a universal peripheral extender includes an I/O device translation & management module that has a device-side utility, a host-side I/O device translation & management utility, and a host/device translation & management scheduler utility.

Described is a method and apparatus for application migration between a dockable device and a docking station in a seamless manner. The dockable device includes a processor and the docking station includes a high-performance processor. The method includes determining a docking state of a dockable device while at least an application is running. Application migration from the dockable device to a docking station is initiated when the dockable device is moving to a docked state. Application migration from the docking station to the dockable device is initiated when the dockable device is moving to an undocked state. The application continues to run during the application migration from the dockable device to the docking station or during the application migration from the docking station to the dockable device.

According to one embodiment, an electronic apparatus includes a connection unit configured to be capable of being connected to a host device, a storage unit configured to store device classes of a plurality of types, a processing unit configured to execute processing for establishing communication with the host device connected to the connection unit by selectively using one device class from among the device classes stored in the storage unit, and a processing control unit configured to change the device class to be used for the processing by the processing unit if a message appropriate for the selected device class is not transmitted from the host device.

An equipment detection system includes a processor, a communication module, and a display module. The processor is configured to detect a connection to an external device. The processor enumerates device information about the external device, obtains user information from a local host, and generates a data structure according to the device information and the user information. The processor is included in the local host. The communication module is configured to transmit the data structure and receive status information. The status information includes a placement space corresponding to the external device or the status of the external device. The status information is associated with the data structure. Moreover, the display module is configured to display the status information.

A method and system configured to receive a first report from a computer peripheral device by a receiver, determine that the first report is corrupted or received at a rate slower than the first report rate, compute a current trajectory of the computer peripheral device based on one or more intervals of movement data in the first report, compute a predicted trajectory of the computer peripheral device based on the first report, compute an incremental displacement of the computer peripheral device based on the predicted trajectory. The method and system can further generate data indicative of a position or displacement of the computer peripheral device based on the predicted trajectory of the computer peripheral device and send the data indicative of a position or displacement of the computer peripheral device at an interval that is less than twice a period of the first report rate to the host computing device.

According to implementations of the subject matter described herein, there is proposed a solution for supporting communications for an FPGA device. In an implementation, the FPGA device includes an application module and protocol stack modules. The protocol stack modules are operable to access target devices based on different communication protocols via a physical interface. The FPGA device further includes a universal access module operable to receive, from the application module, first data and a first identity of a first target device, the first target device acting as a destination of the first data, and transmit, based on the first identity and predetermined first routing information, the first data to a first protocol stack module accessible to the first target device via the physical interface. By introducing the universal access module, it is possible to provide unified and direct communications for the application module.

Enabling peripheral device messaging via application portals in processor-based devices is disclosed herein. In one embodiment, a processor-based device comprises a processing element (PE) including an application portal configured to logically operate as a message store, and that is exposed as an application portal address within an address space visible to a peripheral device that is communicatively coupled to the processor-based device. Upon receiving a message directed to the application portal address from the peripheral device, an application portal control circuit enqueues the message in the application portal. In some embodiments, the PE may further provide a dequeue instruction that may be executed as part of the application, and that results in a top element of the application portal being dequeued and transmitted to the application. Some embodiments may provide further mechanisms for sending success and/or failure notifications, and/or for informing the application that the message has been enqueued.