A device, includes an instruction buffer. The instruction buffer is configured to store instructions related to at least a portion of a data stream to be analyzed by a state machine engine as the device. The state machine engine includes configurable elements configured to analyze the at least a portion of a data stream and to selectively output the result of the analysis. Additionally, the instruction buffer is configured to receive the indications as part of a direct memory access (DMA) transfer.

An information handling system may include a host system processor and a storage resource communicatively coupled to the host system processor. The storage resource may be configured to, responsive to receiving a command from the host system processor relating an address range of the storage resource, create an entry in a drive status table stored in a persistent storage area of the storage resource, the entry setting forth information indicative of the address and a completion status of the command and update a status of the address range in the drive status table as steps of the command are completed by the storage resource, such that, if a drive event occurs preventing full completion of the command, the host system processor may access the drive status table to determine a status of the command, and take a remedial action based on the status of the command.

Provided are techniques for selecting a disconnect by training a machine learning module. A machine learning module is provided that receives inputs and produces an output. The output produced from the machine learning module based on the inputs for the first I/O operation and an estimated amount of time to acquire resources for a first I/O operation is determined. An actual amount of time to acquire resources for the first I/O operation is determined. The machine learning module is retrained based on the inputs, the output, and the actual amount of time it took to acquire resources for the first I/O operation versus an estimated amount of time to acquire the resources for the first I/O operation. The retrained machine learning module is used to select one of disconnect from a channel, the logical disconnect from the channel, or the physical disconnect from the channel for a second I/O operation.

An equipment detection system includes a processor, a communication module, and a display module. The processor is configured to detect a connection to an external device. The processor enumerates device information about the external device, obtains user information from a local host, and generates a data structure according to the device information and the user information. The processor is included in the local host. The communication module is configured to transmit the data structure and receive status information. The status information includes a placement space corresponding to the external device or the status of the external device. The status information is associated with the data structure. Moreover, the display module is configured to display the status information.

Described is a method and apparatus for application migration between a dockable device and a docking station in a seamless manner. The dockable device includes a processor and the docking station includes a high-performance processor. The method includes determining a docking state of a dockable device while at least an application is running. Application migration from the dockable device to a docking station is initiated when the dockable device is moving to a docked state. Application migration from the docking station to the dockable device is initiated when the dockable device is moving to an undocked state. The application continues to run during the application migration from the dockable device to the docking station or during the application migration from the docking station to the dockable device.

According to implementations of the subject matter described herein, there is proposed a solution for supporting communications for an FPGA device. In an implementation, the FPGA device includes an application module and protocol stack modules. The protocol stack modules are operable to access target devices based on different communication protocols via a physical interface. The FPGA device further includes a universal access module operable to receive, from the application module, first data and a first identity of a first target device, the first target device acting as a destination of the first data, and transmit, based on the first identity and predetermined first routing information, the first data to a first protocol stack module accessible to the first target device via the physical interface. By introducing the universal access module, it is possible to provide unified and direct communications for the application module.

A method for encoding a data value to be transmitted on an SPI serial bus includes an operation to modify a status register of a memory, at least at one chosen time instant, as a function of all or part of the data value to be transmitted.

A computing device is provided, including a processor having a plurality of pins that are electrically coupled to a connector via respective traces. The computing device may further include a memory device storing a state table that maps the plurality of pins to a respective plurality of connection protocols. The processor may be configured to implement control logic for the plurality of pins at least in part by receiving a selection of a pin of the plurality of pins. Implementing the control logic may further include receiving an updated connection protocol for the selected pin. Implementing the control logic may further include updating the state table such that the selected pin is mapped to the updated connection protocol. Implementing the control logic may further include, via the connector, establishing a connection to an external device using the updated connection protocol implemented at the selected pin.

Aspects include receiving, at an input/output (I/O) processor, a transport control word (TCW) that includes an instruction to perform physical port mirroring. It is identified, by the I/O processor, a first port to be mirrored and a second port to perform the mirroring. The second port is a physical port on a host bus adapter (HBA). In response to outbound data being sent to the first port for transmission to a first target device and to the instruction specifying outbound port mirroring, the I/O processor sends a copy of the outbound data to a second target device via the second port. In response to receiving inbound data at the first port and to the instruction specifying inbound port mirroring, a copy of the inbound data is transmitted to the second target device via the second port.

A method and system configured to receive a first report from a computer peripheral device by a receiver, determine that the first report is corrupted or received at a rate slower than the first report rate, compute a current trajectory of the computer peripheral device based on one or more intervals of movement data in the first report, compute a predicted trajectory of the computer peripheral device based on the first report, compute an incremental displacement of the computer peripheral device based on the predicted trajectory. The method and system can further generate data indicative of a position or displacement of the computer peripheral device based on the predicted trajectory of the computer peripheral device and send the data indicative of a position or displacement of the computer peripheral device at an interval that is less than twice a period of the first report rate to the host computing device.