Patent classifications
G06F13/128
FIXED ETHERNET FRAME DESCRIPTOR
System and techniques for enhanced electronic navigation maps for a vehicle are described herein. A descriptor set-up message may be received at a network controller interface (NIC). Here, the descriptor set-up message includes an ethernet frame descriptor. The NIC may then use the ethernet frame descriptor to transmit, across a physical interface of the NIC, multiple ethernet frames, each of which use the same ethernet frame descriptor from the set-up message.
INFORMATION PROCESSING APPARATUS, INFORMATION PROCESSING METHOD, AND PROGRAM
[Object] To enable a user's feeling at the time of recording to be experienced by another user.
[Solution] An information processing apparatus according to the present disclosure includes: a display controller that causes display that urges a user to perform an operation for playing back content that is associated with at least one piece of bio-information to be performed on a display section; and a playback controller that, in accordance with the operation by the user, acquires the bio-information and the content from a storage section that stores the bio-information and the content, and causes the bio-information and the content to be played back. This configuration enables the user's feeling at the time of recording content to be experienced by another user.
Method and apparatus for waking up devices in batches, and device
A method for waking up devices in batches where the method includes generating, by a coordinator, a wake-up broadcast frame, where the wake-up broadcast frame includes a wake-up indication field, which instructs multiple devices in a low-rate wireless personal area network (LR-WPAN) to keep in a running state, and sending, by the coordinator, the wake-up broadcast frame at a time interval T2 within duration T1. Hence, the coordinator can wake up some devices directionally using the wake-up indication field in the wake-up broadcast frame. Therefore, resource utilization and wake-up efficiency of the coordinator are improved such that channel utilization and performance of the LR-WPAN are improved.
Image processing apparatus, method of controlling image processing apparatus, and recording medium
An image processing apparatus includes a plurality of memories and a hardware processor which controls an execution operation of a first function including an image processing function and an execution operation of a second function including a server function, by using the plurality of memories. The hardware processor estimates a required bandwidth which is a memory bandwidth required for the execution operation of the first function on the basis of a current operation mode of the image processing apparatus among a plurality of operation modes of the image processing apparatus, and determines a bandwidth securing channel for first function which is a channel capable of being used for the execution operation of the first function and incapable of being used for the execution operation of the second function, out of a plurality of channels used to access the plurality of memories, on the basis of the required bandwidth.
METHOD AND DEVICE FOR OFFLOADING PROCESSING OF DATA FLOWS
In accordance with various implementations, a method is performed at a data plane node with one or more processors, non-transitory memory, and a control interface between a network function module associated with the data plane node and a switch associated with the data plane node. The method includes determining whether an offload capability is available for a data flow received at an ingress network interface of the data plane node. The method also includes determining whether the data flow satisfies offload criteria in response to determining that the offload capability is available. The method includes bypassing the network function module associated with the data plane node and providing the data flow to at least one of the switch associated with the data plane node or an egress network interface associated with the data plane node in response to determining the offload capability is available and the offload criteria is satisfied.
PERIPHERAL DEVICE CONTROLLING DEVICE, OPERATION METHOD THEREOF, AND OPERATION METHOD OF PERIPHERAL DEVICE CONTROLLING DEVICE DRIVER
A peripheral device controlling device according to an embodiment of the inventive concept includes a command queue for storing at least one Device to Device (D2D) command for data communication between a first peripheral device and a second peripheral device, a command parser for obtaining information related to the data communication from the at least one D2D command, and an orchestrator for controlling at least one of the first peripheral device and the second peripheral device to transfer data from the first peripheral device to the second peripheral device based on the acquired information.
Support of Option-ROM in Socket-Direct network adapters
A network adapter includes one or more network ports, multiple bus interfaces, and a processor. The one or more network ports are configured to communicate with a communication network. The multiple bus interfaces are configured to communicate with multiple respective Central Processing Units (CPUs) that belong to a multi-CPU device. The processor is configured to support an Option-ROM functionality, in which the network adapter holds Option-ROM program instructions that are loadable and executable by the multi-CPU device during a boot process, and, in response to a request from the multi-CPU device to report the support of the Option-ROM functionality, to report the support of the Option-ROM functionality over only a single bus interface, selected from among the multiple bus interfaces connecting the network adapter to the multi-CPU device.
Network interface card switching for virtual networks
In some examples, a computing device comprises a virtual network endpoint; a network interface card (NIC) comprising a first hardware component and a second hardware component, wherein the first hardware component and the second hardware component provide separate packet input/output access to a physical network interface of the NIC, wherein the NIC is configured to receive a packet inbound from the physical network interface; and a virtual router to receive the packet from the NIC and output, using the first hardware component, in response to determining a destination endpoint of the packet is the virtual network endpoint, the packet back to the NIC, wherein the NIC is further configured to switch, in response to receiving the packet from the virtual router, the packet to the virtual network endpoint and to output, using the second hardware component, the packet to the virtual network endpoint.
Stacked die network interface controller circuitry
A smart network interface controller (NIC) implemented using a stacked die configuration is provided. The NIC may include user-customizable networking circuits formed in a top programmable die and primitive network function blocks formed in a bottom application-specific integrated circuit (ASIC) die. The top programmable die may provide a flexible packet processing pipeline to facilitate efficient control and data communication between the user-customizable networking circuits and the primitive network function blocks. The bottom ASIC die may also include an array of memory blocks operable as lookup tables and intermediate buffers for other network processing circuitry in the NIC. A NIC configured in this way provides both performance, power, and area benefits and superior customer configurability.
Method and Apparatus for Processing Access Request, Storage Apparatus, and Storage Medium
An access request in a remote direct memory access (RDMA) format is first obtained from the internal memory of the storage apparatus, where the access request is used for requesting to access the persistent storage medium in the storage apparatus. Then, the access request in the RDMA format is directly converted into an access request in a Non-Volatile Memory Express (NVMe) format, and a target operation corresponding to the access request in the NVMe format is executed to access the persistent storage medium.