Patent classifications
G06F13/128
COMMUNICATION INTERFACE
A communication interface includes a first and second interface module to provide for point-to-point transmission of signalling to a second or third node respectively and receipt of signalling from the second node or third node respectively via one or more first terminals. The first and second interface modules include one or more second terminals to communicatively couple a first processor and the first or second interface module. At least one interface-to-interface connection couples the first interface module and the second interface module. A routing module reads a data frame and, based on whether or not an identifier present in a routing field of the data frame matches one or more predetermined identifiers, provides for forwarding of the data frame to the first processor or to the interface-to-interface connection for retransmission by the other of the first interface module and the second interface module.
SERVER DELAY CONTROL DEVICE, SERVER DELAY CONTROL METHOD, AND PROGRAM
A server delay control device includes: a data arrival notifier that notifies a data processing APL of data acquired by a data arrival monitor and passes the data to the data processing APL (1); and a manager that causes a polling thread to sleep and cancels sleep of the polling thread by a hardware interrupt when a packet arrives, and the manager controls a timing of the sleep by permitting the hardware interrupt on the basis of characteristics of an application program.
SYSTEMS AND METHODS FOR MOVING DATA BETWEEN A STORAGE DEVICE AND A PROCESSING ELEMENT
Systems and methods for moving data between a storage device and a processing element are disclosed. The storage device may include: a non-volatile storage medium; a first interface for communicating with a computing device; and a second interface for communicating with a processing element over a data communications network. The processing element may include a processing circuit that is configured to: receive a first request from the computing device via the first interface, where the first request identifies a first memory address associated with the first memory; retrieve first data from the non-volatile storage medium based on the first request; and transmit the first data to the processing element via the second interface for storing the first data in the first memory based on the first memory address.
Deterministic packet scheduling and DMA for time sensitive networking
In one embodiment, a network interface controller (NIC) includes multiple packet transmission queues to queue data packets for transmission. The data packets are assigned to multiple traffic classes. The NIC also includes multiple input/output (I/O) interfaces for retrieving the data packets from memory. Each I/O interface is assigned to a subset of the traffic classes. The NIC also includes scheduler circuitry to select a first data packet to be retrieved from memory, and direct memory access (DMA) engine circuitry to retrieve the first data packet from memory via one of the I/O interfaces based on the traffic class of the first data packet, and store the first data packet in one of the packet transmission queues. The NIC also includes a transmission interface to transmit the first data packet over a network at a corresponding launch time indicated by the scheduler circuitry.
Data flow management
A switch is described. The switch includes a plurality of ports, a plurality of port logic modules, a memory, and a switch fabric. Transactions ingress and egress the switch via the ports. The port logic modules are coupled with the ports. Each port logic module has core clock domain logic for a core clock domain specific to a corresponding port. The memory includes banks. The memory and the switch fabric have a system clock domain. The core clock domain for each of the port logic modules is different from the system clock domain.
DETERMINATION OF ACTIVE AND STANDBY SMART NICS THROUGH DATAPATH
Some embodiments provide a method for a first smart NIC of multiple smart NICs of a host computer. Each of the smart NICs executes a smart NIC operating system that performs networking operations for a set of data compute machines executing on the host computer. When the first smart NIC identifies itself as an active smart NIC for the host computer, the first smart NIC sends a first message through a datapath to a second smart NIC to verify whether the second smart NIC identifies as an active smart NIC or a standby smart NIC. If the second smart NIC sends a reply second message to the first smart NIC through the datapath, the first smart NIC (i) determines that the second smart NIC identifies as a standby smart NIC and (ii) operates to process data traffic sent to and from the host computer as the active smart NIC.
Devices, Methods, and Graphical User Interfaces for Wireless Pairing with Peripheral Devices and Displaying Status Information Concerning the Peripheral Devices
An electronic device, while in wireless communication with a wireless accessory, and while displaying a system user interface, detects that the wireless accessory is charging, and in response to detecting that the wireless accessory is charging, displays a charging alert that indicates that the wireless accessory is charging.
Data processing method and apparatus
A data processing method, applied to a server including a network interface card, a central processing unit and a storage medium. The network interface card performs traffic distribution processing on initial data, determines control data, index data and service data of the initial data, and stores the control data and the index data in the central processing unit. The central processing unit parses the control data, determines a data execution operator corresponding to the control data, issues the data execution operator to the network interface card, processes the index data of the initial data, and stores the processed index data in the medium. The network interface card performs calculation on the service data based on the data execution operator, and stores, in the medium, target service data, index data of the target service data, and metadata of the target service data and the index data determined through the calculation.
STORAGE DEVICE WITH HARDWARE ACCELERATOR
A storage device includes a storage controller, a Flash Memory and a hardware accelerator communicatively coupled. The hardware accelerator is configured to selectively retrieve data stored in the flash memory in response to a request for the data and may perform other operation to accelerate data access for a computer system.
Host polling of a network adapter
Embodiments herein describe a host that polls a network adapter to receive data from a network. That is, the host/CPU/application thread polls the network adapter (e.g., the network card, NIC, or SmartNIC) to determine whether a packet has been received. If so, the host informs the network adapter to store the packet (or a portion of the packet) in a CPU register. If the requested data has not yet been received by the network adapter from the network, the network adapter can delay the responding to the request to provide extra time for the adapter to receive the data from the network.