Remote storage management using linked directory objects that are persisted in one of a plurality of remote storages. A first directory object is generated to record addresses of a plurality of fragments of data, relational to identifiers of the plurality of fragments of data. In response to determining that an address of at least one of the plurality of fragments is changed, a second directory object is generated to record a changed address of the at least one fragment. An address of the second directory object is then recorded in the first directory object, associating the address of the second directory object with the previous address of the at least one fragment stored in the first directory object.

A method for adjusting complexity of content rendered by a graphical processing unit (GPU) is described. The method includes processing, by the GPU, an image frame for a scene of a game. The method further includes tracking one or more metrics regarding the processing of the image frame during the processing of the image frame. During the processing of the image frame, the method includes sending a quality adjuster signal (QAS) to a shader associated with a game engine. The QAS is generated based on the one or more metrics associated with the processing by the GPU. During the processing of the image frame, the method includes adjusting, by the shader, one or more shader parameters upon receipt of the QAS, wherein said adjusting the one or more shader parameters changes a level of complexity of the image frame being processed by the GPU.

Disclosed in some examples are methods, systems, memory controllers, devices, and machine-readable mediums which minimize this stall time by returning a memory write acknowledgement once a write command has been selected by the memory controller input multiplexor rather than when the memory write command has been performed. Because the memory controller enforces an ordering to memory once the packet has been selected at an input multiplexor, ordering of prior and subsequent requests to the same address location are preserved and providing the response early allows the processor to continue its operations earlier without any harmful effects.

Generally disclosed herein is a hardware/software interface for asynchronous data movement between an off-core memory and a core-local memory, referred to as “stream transfers”, and a stream ordering model. The stream transfers allow software to more efficiently express common data-movement patterns, specifically ones seen in sparse workloads. Direct stream instructions that belong to a stream are processed in-order. For indirect stream instructions, offset elements in an offset list are processed in order. A sync flag is updated to indicate monotonic incremental progress for the stream.

A host interconnection device includes a serializing module, an analysis module, an arbitration module, a data-writing tracking module, and a data-reading tracking module. The serializing module serializes at least one first read/write request generated by at least one processing module and a second read/write request generated by a chipset module, and outputs the first read/write request or the second read/write request. The analysis module generates analysis information according to the first read/write request or the second read/write request. The arbitration module arbitrates the analysis information and snoop information, and generates arbitration information. The data-writing tracking module performs a data-writing tracking operation on the arbitration information to generate a first snoop request, a data-writing indication, and a data-writing request. The data-reading tracking module performs a data-reading tracking operation on the arbitration information to generate a second snoop request, a data-reading indication, and a data-reading request.

Technologies for connecting data cables in a data center are disclosed. In the illustrative embodiment, racks of the data center are grouped into different zones based on the distance from the racks in a given zone to a network switch. All of the racks in a given zone are connected to the network switch using data cables of the same length. In some embodiments, certain physical resources such as storage may be placed in racks that are in zones closer to the network switch and therefore use shorter data cables with lower latency. An orchestrator server may, in some embodiments, schedule workloads or create virtual servers based on the different zones and corresponding latency of different physical resources.

Some embodiments of the invention provide a network forwarding element that can be dynamically reconfigured to adjust its data message processing to stay within a desired operating temperature or power consumption range. In some embodiments, the network forwarding element includes (1) a data-plane forwarding circuit (“data plane”) to process data tuples associated with data messages received by the IC, and (2) a control-plane circuit (“control plane”) for configuring the data plane forwarding circuit. The data plane includes several data processing stages to process the data tuples. The data plane also includes an idle-signal injecting circuit that receives from the control plane configuration data that the control plane generates based on the IC's temperature. Based on the received configuration data, the idle-signal injecting circuit generates idle control signals for the data processing stages. Each stage that receives an idle control signal enters an idle state during which the majority of the components of that stage do not perform any operations, which reduces the power consumed and temperature generated by that stage during its idle state.

One embodiment facilitates measurement of a performance of a storage device. During operation, the system determines a normalized cost for an I/O request, wherein the normalized cost is independent of an access pattern and a type of the I/O request, wherein the normalized cost is indicated by a first number of virtual I/O operations consumed by the I/O request, and wherein a virtual I/O operation is used as a logical unit of cost associated with physical I/O operations. The system identifies a performance metric for the storage device by calculating a second number of virtual I/O operations per second which can be executed by the storage device. The system allocates incoming I/O requests to the storage device based on the performance metric, e.g., to satisfy a Quality of Service requirement, thereby causing an enhanced measurement of the performance of the storage device.

An instruction can be received at a sequencer from a controller. The sequencer can be in a package including the sequencer and one or more memory components. The sequencer is operatively coupled to a controller that is separate from the package. A processing device of the sequencer can perform an operation based on the instruction on at least one of the one or more memory components in the package.

Embodiments are generally directed apparatuses, methods, techniques and so forth to select two or more processing units of the plurality of processing units to process a workload, and configure a circuit switch to link the two or more processing units to process the workload, the two or more processing units each linked to each other via paths of communication and the circuit switch.