Patent classifications
G06F13/366
APPARATUS AND METHOD FOR DETERMINING A DISCONNECTION OF A DEVICE FROM A BUS
An apparatus for determining a disconnection of a device from a bus, the apparatus comprising: a detection unit configured to periodically poll the bus, to detect an occurrence of an indicator of disconnection; and a handling unit configured to, in response to detecting the occurrence of an indicator of disconnection a predetermined number of times within a predetermined interval, make a determination that the device is disconnected from the bus. A method for determining a disconnection of a device from a bus is also presented.
APPARATUS AND METHOD FOR DETERMINING A DISCONNECTION OF A DEVICE FROM A BUS
An apparatus for determining a disconnection of a device from a bus, the apparatus comprising: a detection unit configured to periodically poll the bus, to detect an occurrence of an indicator of disconnection; and a handling unit configured to, in response to detecting the occurrence of an indicator of disconnection a predetermined number of times within a predetermined interval, make a determination that the device is disconnected from the bus. A method for determining a disconnection of a device from a bus is also presented.
Round Robin Arbitration Using Random Access Memory
A circuit performs a method of arbitrating requests between multiple requestors. The method includes accessing, via an arbitration processor, a requestor random access memory (RRAM) having multiple entries. Each entry corresponds to a requestor and includes a valid field indicating whether or not the requestor is requesting. One of the multiple entries is selected in a round robin manner as a function of a value in the valid field indicative of the corresponding requestor requesting. The corresponding requestor requesting arbitration is notified.
MULTI-PATH UNIVERSAL ASYNCHRONOUS TRANSCEIVER AND TRANSMISSION METHOD THEREOF
The present disclosure provides a multi-path universal asynchronous transceiver (UART) and transmission method thereof. The multi-path UART comprises a first buffer, a second buffer, and a tx aggregation and arbitration circuit respectively coupled to the first buffer and the second buffer and presets a predetermined threshold. The tx aggregation and arbitration circuit polls the first buffer and the second buffer according to the predetermined threshold, and executes an arbitration procedure on the first buffer and the second buffer to obtain at least one of first log information packet and at least one of second log information packet correspondingly. Thus, when inputting a plurality of log sources, it is not necessary to have a plurality of output pins and to avoid disorder caused by the cross-influence of multiple log information for resource conservation and providing log information correctness.
MULTI-PATH UNIVERSAL ASYNCHRONOUS TRANSCEIVER AND TRANSMISSION METHOD THEREOF
The present disclosure provides a multi-path universal asynchronous transceiver (UART) and transmission method thereof. The multi-path UART comprises a first buffer, a second buffer, and a tx aggregation and arbitration circuit respectively coupled to the first buffer and the second buffer and presets a predetermined threshold. The tx aggregation and arbitration circuit polls the first buffer and the second buffer according to the predetermined threshold, and executes an arbitration procedure on the first buffer and the second buffer to obtain at least one of first log information packet and at least one of second log information packet correspondingly. Thus, when inputting a plurality of log sources, it is not necessary to have a plurality of output pins and to avoid disorder caused by the cross-influence of multiple log information for resource conservation and providing log information correctness.
USING STORAGE CONTROLLERS TO RESPOND TO MULTIPATH INPUT/OUTPUT REQUESTS
A computer program product, according to one embodiment, includes a computer readable storage medium having program instructions embodied therewith. The computer readable storage medium is not a transitory signal per se. Moreover, the program instructions are readable and/or executable by a controller to cause the controller to perform a method which includes: receiving a same input/output request along more than one communication paths, and evaluating a workload associated with each of the communication paths. A communication path having a lowest workload associated therewith is selected. Moreover, information corresponding to the input/output request as well as a status are sent along the selected communication path. The status sent indicates that the selected communication path was chosen to satisfy the input/output request. A special status indicating that none of the remaining communication paths were chosen to satisfy the input/output request is also sent along each of the remaining communication paths.
USING STORAGE CONTROLLERS TO RESPOND TO MULTIPATH INPUT/OUTPUT REQUESTS
A computer program product, according to one embodiment, includes a computer readable storage medium having program instructions embodied therewith. The computer readable storage medium is not a transitory signal per se. Moreover, the program instructions are readable and/or executable by a controller to cause the controller to perform a method which includes: receiving a same input/output request along more than one communication paths, and evaluating a workload associated with each of the communication paths. A communication path having a lowest workload associated therewith is selected. Moreover, information corresponding to the input/output request as well as a status are sent along the selected communication path. The status sent indicates that the selected communication path was chosen to satisfy the input/output request. A special status indicating that none of the remaining communication paths were chosen to satisfy the input/output request is also sent along each of the remaining communication paths.
MANAGING EFFICIENT SELECTION OF A PARTICULAR PROCESSOR THREAD FOR HANDLING AN INTERRUPT
A snooper of a processing unit connected to processing units via a system fabric receives a first single bus command in a bus protocol that allows sampling over the system fabric of the capability of snoopers to handle an interrupt and returns a first response indicating the capability of the snooper to handle the interrupt. The snooper, in response to receiving a second single bus command in the bus protocol to poll a first selection of snoopers for an availability status to service a criteria specified in the second single bus command, returns a second response indicating the availability of the snooper to service the criteria. The snooper, in response to receiving a third single bus command in the bus protocol to direct the snooper to handle the interrupt, assigns the interrupt to a particular processor thread of a respective selection of the one or more separate selections of processors threads distributed in the processing unit.
MANAGING EFFICIENT SELECTION OF A PARTICULAR PROCESSOR THREAD FOR HANDLING AN INTERRUPT
A snooper of a processing unit connected to processing units via a system fabric receives a first single bus command in a bus protocol that allows sampling over the system fabric of the capability of snoopers to handle an interrupt and returns a first response indicating the capability of the snooper to handle the interrupt. The snooper, in response to receiving a second single bus command in the bus protocol to poll a first selection of snoopers for an availability status to service a criteria specified in the second single bus command, returns a second response indicating the availability of the snooper to service the criteria. The snooper, in response to receiving a third single bus command in the bus protocol to direct the snooper to handle the interrupt, assigns the interrupt to a particular processor thread of a respective selection of the one or more separate selections of processors threads distributed in the processing unit.
Distribution of master device tasks among bus queues
Examples include the distribution of master device tasks among bus queues. Some examples include distribution of a plurality of tasks of a master device among a plurality of bus queues, each for a respective one of a plurality of busses of a computing system, selection of an arbitration timeout time for a task at a front of one of the bus queues, and a request for access to one of the busses from a bus arbiter.