G06F13/4009

LINK LAYER DATA PACKING AND PACKET FLOW CONTROL SCHEME

Systems, apparatuses, and methods for performing efficient data transfer in a computing system are disclosed. A computing system includes multiple fabric interfaces in clients and a fabric. A packet transmitter in the fabric interface includes multiple queues, each for storing packets of a respective type. The packet transmitter includes multiple queue arbiters, each for selecting a candidate packet from a respective one of the multiple queues. The packet transmitter includes a buffer for storing a link packet, which includes data storage space for storing multiple candidate packets. The packet transmitter selects qualified candidate packets from the multiple queues and inserts these candidate packets into the link packet. The packing arbiter avoids data collisions at the receiver by taking into consideration mismatches between the rate of inserting candidate packets into the link packet and the rate of creating available data storage space in a receiving queue in the receiver.

PREDICTIVE PACKET HEADER COMPRESSION
20190391936 · 2019-12-26 · ·

Packets may be compressed based on predictive analyses. For example, in one embodiment, it is determined that an explicit value for a particular header field can be inferred by the receiver agent, a packet header is constructed that either omits the header field or includes a differential value for the header field in lieu of the explicit value for the header field. The packet header may be decompressed upon receipt by deriving the explicit value for the particular header field.

Direct drive LED driver and offline charge pump and method therefor
10515034 · 2019-12-24 ·

In one embodiment, a Light Emitting Diode (LED) driving device for driving a plurality of LEDs has a switching matrix utilizing a plurality of one of a turn off thyristors or turn off triacs coupled to the plurality of LEDs. A controller is coupled to the switching matrix responsive to a voltage of a rectified AC halfwave, wherein combinations of the plurality of LEDs are altered to ensure a maximum operating voltage of the plurality of LEDs is not exceeded. A current limiting device is coupled to the combinations of the plurality of LED to regulate current. In a second embodiment an offline charge pump utilizes a switching matrix to recombine capacitors in accordance with the voltage on the AC half wave and then in accordance with a desired output voltage to feed a load, such that said recombinations occur at a frequency much higher than the frequency of the AC rectified half wave such that charge is pumped from the input at one voltage to the output at another voltage through the AC halfwave while providing a constant output voltage to the load.

Direct drive LED driver and offline charge pump and method therefor
10515035 · 2019-12-24 ·

In one embodiment, a Light Emitting Diode (LED) driving device for driving a plurality of LEDs has a switching matrix utilizing a plurality of one of a turn off thyristors or turn off triacs coupled to the plurality of LEDs. A controller is coupled to the switching matrix responsive to a voltage of a rectified AC halfwave, wherein combinations of the plurality of LEDs are altered to ensure a maximum operating voltage of the plurality of LEDs is not exceeded. A current limiting device is coupled to the combinations of the plurality of LED to regulate current. In a second embodiment an offline charge pump utilizes a switching matrix to recombine capacitors in accordance with the voltage on the AC half wave and then in accordance with a desired output voltage to feed a load, such that said recombinations occur at a frequency much higher than the frequency of the AC rectified half wave such that charge is pumped from the input at one voltage to the output at another voltage through the AC halfwave while providing a constant output voltage to the load.

Direct drive LED driver and offline charge pump and method therefor
10509749 · 2019-12-17 ·

In one embodiment, a Light Emitting Diode (LED) driving device for driving a plurality of LEDs has a switching matrix utilizing a plurality of one of a turn off thyristors or turn off triacs coupled to the plurality of LEDs. A controller is coupled to the switching matrix responsive to a voltage of a rectified AC halfwave, wherein combinations of the plurality of LEDs are altered to ensure a maximum operating voltage of the plurality of LEDs is not exceeded. A current limiting device is coupled to the combinations of the plurality of LED to regulate current. In a second embodiment an offline charge pump utilizes a switching matrix to recombine capacitors in accordance with the voltage on the AC half wave and then in accordance with a desired output voltage to feed a load, such that said recombinations occur at a frequency much higher than the frequency of the AC rectified half wave such that charge is pumped from the input at one voltage to the output at another voltage through the AC halfwave while providing a constant output voltage to the load.

DATA TRANSMISSION METHOD, DATA TRANSMISSION DEVICE, AND DATA TRANSMISSION SYSTEM

A data transmission method to transmit data contained in k independent data streams to k receivers with a data transmission device, wherein specific data stream identifiers are attached to the independent data streams and then multiplexed into I multiplexed data streams. The multiplexed data streams are then transmitted via I UARTs to k microcontrollers which demultiplex the multiplexed data streams and select one of the contained independent data streams via an allocation protocol. The allocation protocol is identical on all microcontrollers and utilizes the specific data stream identifiers to allocate the k independent data streams to exactly one of the k receivers. The microcontrollers then send their selected independent data stream to an allocated receiver.

WRITING BLOCK FOR A RECEIVER
20190347221 · 2019-11-14 ·

A writing-block for writing data to a memory-buffer, wherein the memory-buffer comprises an ordered sequence of elements and the writing-block is configured to: receive an input-data-stream; and write the input-data-stream to the memory-buffer in a successive manner from a first-element of the ordered sequence to a predetermined-element of the ordered sequence. Following writing to the predetermined-element the writing-block is configured to continue to write the input-data-stream to the memory-buffer in a successive manner restarting at the first-element. In response to writing the predetermined-element, the writing-block is configured to also continue to write the input-data-stream to the memory-buffer in a successive manner from an element immediately following the predetermined element until a second predetermined-element of the memory-buffer.

SEMICONDUCTOR MEMORY DEVICE
20190348400 · 2019-11-14 ·

A semiconductor memory device includes a substrate that has a first main surface and a second main surface opposite to the first main surface, a first semiconductor chip which is mounted on the first main surface and includes a first register, a plurality of first input/output (IO) terminals, and a first circuit connected between the first IO terminals and the first register, and a second semiconductor chip which is mounted on the second main surface and includes a second register, a plurality of second input/output (IO) terminals, and a second circuit connected between the second IO terminals and the second register. The second circuit is connected to the second IO terminals through input lines and to the second register through output lines, and is configured to change a connection path between the input lines and the output lines in response to a connection change command.

Communication device, communication system, and communication method for transmitting a serial signal group conforming to a serial peripheral interface

A communication device includes a communication unit configured to transmit a serial signal group conforming to a serial peripheral interface (SPI) and transmitted from a master in synchronization with a clock to a communication partner device as a batch of data blocks within one frame period of a predetermined communication protocol, or transmit the serial signal group to the communication partner device as a plurality of data blocks divided according to a plurality of frame periods.

Reducing coupling and power noise on PAM-4 I/O interface
11966348 · 2024-04-23 · ·

Methods of operating a serial data bus divide series of data bits into sequences of one or more bits and encode the sequences as N-level symbols, which are then transmitted at multiple discrete voltage levels. These methods may be utilized to communicate over serial data lines to improve bandwidth and reduce crosstalk and other sources of noise.