A pixel circuit includes: a first transistor including a gate electrode connected to a first node, a source electrode connected to a first power line, and a drain electrode connected to a second power line; a light emitting element connected between the first transistor and the first or second power line; a second transistor connected between a data line and the first node, and including a gate electrode connected to a first scan line; a first capacitor connected between the first node and the source electrode of the first transistor; a third transistor connected between the first node and the first power line, and including a gate electrode connected to a second node; a fourth transistor connected between the second node and the data line, and including a gate electrode connected to a second scan line; and a second capacitor connected between the second node and a first control line.

Electronic display devices include digital and analog control of pixel intensity. A digital pixel control circuit and an analog pixel control circuit are provided within each pixel. The digital pixel control circuit employs digital PWM techniques to control a number of subframes within each frame during which a driving current is supplied to a light emitting element within the pixel. The analog pixel control circuit controls the level of the driving current supplied to the light emitting element within the pixel during the frame. In one example, the digital pixel control circuit and the analog pixel control circuit may together control pixel intensity with the analog pixel control circuit providing additional in-pixel bits for increased color depth. Alternatively, the digital pixel control circuit may control pixel intensity and the analog pixel control circuit may control non-uniformity compensation.

A display device includes a substrate, a plurality of pixel electrodes on the substrate and spaced apart from each other, a plurality of light-emitting elements on the plurality of pixel electrodes, respectively, and a common electrode layer on the plurality of light-emitting elements and to which a common voltage is applied. The plurality of light-emitting elements include a first light-emitting element that is configured to emit first light according to a first driving current and a second light-emitting element that is configured to emit second light according to a second driving current. An active layer of the first light-emitting element is the same as an active layer of the second light-emitting element.

A display device comprises a substrate, a pixel electrode on the substrate, a light emitting element on the pixel electrode, and a common electrode layer on the light emitting element, and configured to receive a common voltage, wherein the light emitting element configured to emit a first light according to a driving current having a first current density, is configured to emit a second light according to a driving current having a second current density, and is configured to emit a third light according to a driving current having a third current density.

The present disclosure provides a driving circuit of a display device and the display device. The driving circuit includes an input unit, a control unit coupled to the input unit, and a light emitting unit coupled to the control unit. The control unit is configured to drive the light emitting unit to emit light. the control unit comprises a pulse width modulation (PWM) control unit and a pulse amplitude modulation (PAM) control unit, the PWM control unit and the PAM control unit are mutually independent, the PWM control unit is configured to control a light emitting time of the light emitting unit, and the PAM control unit is configured to control a magnitude of a driving current in the light emitting unit.

The present disclosure provides a display panel and a method for manufacturing the same, wherein the display panel includes a substrate and a plurality of display units disposed on the substrate, and the plurality of display units are disposed in an array; wherein each of the display units is integrated with micro light-emitting diode (LED) chips and pulse width modulation (PWM) chips electrically connected to the micro LED chips, and PWM circuits are formed in the PWM chip PWM driving circuits, and the PWM circuit the PWM driving circuits are configured to control light emitting time of the micro LED chips.

A sweep signal driver includes: a kth stage to output a kth emission signal to a kth emission line, and a kth sweep signal to a kth sweep signal line, the kth stage including: first, second, and third pull-up nodes; a node connection circuit between the first pull-up node and the second pull-up node, and between the first pull-up node and the third pull-up node; a first output circuit to output a sweep clock signal of a sweep clock terminal to a first output terminal connected to the kth sweep signal line when the third pull-up node has a gate-on voltage; and a second output circuit to output a gate-on voltage to a second output terminal connected to the kth emission line when the second pull-up node has a gate-on voltage. A pulse of the kth sweep signal linearly changes from a gate-off voltage to the gate-on voltage.

A display device may include a display panel, a backlight unit including a plurality of blocks for providing light to the display panel, each of the plurality of blocks comprising a plurality of light emitting diodes (LEDs), and a controller configured to obtain backlight control information and to activate a duty ratio control function for controlling a duty ratio and current flowing in a block during a cycle of one frame, when a low current condition is satisfied based on the obtained backlight control information.

The present embodiments disclose a pixel driving circuit and a display device including the same. A pixel driving circuit according to an embodiment of the present disclosure includes a first pixel circuit configured to control light-emission and non-emission of the luminous element in response to a control signal applied to each of a plurality of subframes constituting a frame during a light-emitting period and a second pixel circuit storing a bit value of image data in a data writing period and generating the control signal based on the bit value and a clock signal in the light-emitting period.

A pixel circuit includes a driving circuit, a first control circuit and a second control circuit. The driving circuit is configured to receive a data signal in response to a scan signal, and generate, in response to a first enable signal, a driving signal according to a first voltage and the data signal. The first control circuit is configured to: receive a first input signal in response to a first control signal, and transmit a third input signal in response to the first input signal; and receive a second input signal in response to a second control signal, and transmit a second enable signal in response to the second input signal. The second control circuit is configured to transmit the driving signal to an element to be driven in response to one of the third input signal and the second enable signal.