Disclosed is a driving method of a liquid crystal display panel. Area division is implemented to obtain at least three division areas for individually providing a compensation signal voltage to each division area according to the difference of the actual brightnesses and the target brightnesses, and with the compensation signal voltage, implementing enhancement to a data signal voltage corresponded with a sub pixel, of which a difference of the data signal voltage (V+) in a positive polarity driving cycle or the data signal voltage (V) in a negative polarity driving cycle and the common voltage (VCOM) is smaller, and implementing abatement to a data signal voltage corresponded with a sub pixel, of which a difference of the data signal voltage (V+) in the positive polarity driving cycle or the data signal voltage (V) in the negative polarity driving cycle and the common voltage (VCOM) is larger.

A highly convenient electronic device used while being worn on a body is provided. The electronic device is an arm-worn electronic device including a display panel, a power storage device, a circuit, and a sealing structure. The display panel displays an image with power supplied from the power storage device. The circuit includes an antenna and charges the power storage device wirelessly. Inside the sealing structure, the display panel, the power storage device, and the circuit are provided. The sealing structure includes a portion that transmits visible light. The sealing structure can be worn on an arm or is connected to a structure body that can be worn on an arm.

A display device including a controller configured to control the source driver and the gate driver based on a control mode for displaying the frame image on the display portion, wherein: in the basic control mode, the controller is configured to display the frame image on the display portion by causing the gate driver to progressively scan all of the N gate signal lines within a predetermined time period, in the low-power control mode, the controller is configured to display a sub-frame image on the display portion by causing the gate driver to scan W gate signal lines within the predetermined time period, and to perform interlaced scanning of the plurality of gate signal lines every K lines, the control mode is configured to shift from the basic control mode to the low-power control mode by way of the first shift control mode.

Disclosed is a driving method of a liquid crystal display panel. Area division is implemented to obtain at least three division areas for individually providing a compensation signal voltage to each division area according to the difference of the actual brightnesses and the target brightnesses, and with the compensation signal voltage, implementing enhancement to a data signal voltage corresponded with a sub pixel, of which a difference of the data signal voltage (V+) in a positive polarity driving cycle or the data signal voltage (V) in a negative polarity driving cycle and the common voltage (VCOM) is smaller, and implementing abatement to a data signal voltage corresponded with a sub pixel, of which a difference of the data signal voltage (V+) in the positive polarity driving cycle or the data signal voltage (V) in the negative polarity driving cycle and the common voltage (VCOM) is larger.

A liquid crystal panel includes a first substrate, a second substrate spaced apart from the first substrate, and a liquid crystal layer between the first substrate and the second substrate. The second substrate includes an ITO layer facing toward the liquid crystal layer, the ITO layer comprises at least one first pixel electrode layer, at least one common electrode layer, and at least one second pixel electrode layer spaced apart from each other. A first voltage difference between the first pixel electrode layer and the common electrode layer is different from a second voltage difference between the second pixel electrode layer and the common electrode layer. In this way, the intensity of the horizontal electrical field above the common electrode layer is enhanced such that the transmission rate of the liquid crystal panel may be increased.

The present disclosure provides a method for driving a cholesteric liquid crystal display device. The method includes the following steps: utilizing a driving circuit section to sequentially activate each scanning electrode within a display panel; utilizing the driving circuit section to apply first alternating-current (AC) voltage pulses to pixel circuits on an activated scanning electrode during a first stage within a pulse-width modulation (PWM) scanning procedure of an activated scanning electrode; and utilizing the driving circuit section to apply second AC voltage pulses to the pixel circuits on the activated scanning electrode during a second stage of the PWM scanning procedure. A first voltage amplitude and a first period of the first AC voltage pulses are different from a second voltage amplitude and a second period of the second AC voltage pulses, respectively.

The present invention provides an array substrate and a manufacturing method thereof. The manufacturing method of the array substrate according to the present invention forms a gate electrode in the same metal layer with source and drain electrodes and divides a common electrode layer that is conventionally in the form of an entire surface into two portions, of which one serves as a common electrode, while the other portion feeds an input of a gate scan signal thereby eliminating an operation of forming an interlayer insulation layer and thus reducing manufacturing cost of the operation. The array substrate of the present invention comprises a gate electrode that is formed in the same metal layer with source and drain electrodes so that no interlayer insulation layer is present between the gate electrode and the source and drain electrodes, thereby simplifying the structure and reducing the manufacturing cost of the array substrate.

The present invention provides an array substrate and a manufacturing method thereof. The manufacturing method of the array substrate according to the present invention forms a gate electrode in the same metal layer with source and drain electrodes and divides a common electrode layer that is conventionally in the form of an entire surface into two portions, of which one serves as a common electrode, while the other portion feeds an input of a gate scan signal thereby eliminating an operation of forming an interlayer insulation layer and thus reducing manufacturing cost of the operation. The array substrate of the present invention comprises a gate electrode that is formed in the same metal layer with source and drain electrodes so that no interlayer insulation layer is present between the gate electrode and the source and drain electrodes, thereby simplifying the structure and reducing the manufacturing cost of the array substrate.

According to one embodiment, a power reception section connects to the battery side, and receives supply of power, a detection section detects a singular state where a voltage of the battery side has fallen to a value less than or equal to a predetermined voltage value, a shifting section receives a detection output of the singular state from the detection section to thereby shift to singular control, and a driver connection section connects the plurality of drivers to each other. If the detection section in one of the liquid crystal display drivers has detected the singular state, the shifting section executes the singular control, and the driver connection section notifies the other liquid crystal display drivers that the singular state has been detected.

A display device includes a display panel including data lines and scan lines coupled, a data driver configured to supply data voltages to the data lines based on digital video data, a scan driver configured to supply scan signals to the scan lines, a timing controller configured to select one of a normal mode and a self-refresh mode based on a panel self-refresh enable signal, where the data and scan drivers are driven by a first frame frequency in the normal mode and by a second frame frequency lower than the first frame frequency in the self-refresh mode, and a power supply source configured to supply driving voltages to the data and scan drivers and the timing controller and to transmits a direct current power voltage to an outside thereof, where a transmission of the direct current power voltage is blocked during a blank period in the self-refresh mode.