Patent classifications
G09G2300/0838
Electro-optical device having a storage capacitor formed by a data line and a potential line
An electro-optical device is provided with a plurality of data lines, a plurality of potential lines supplied with a predetermined potential, a driving transistor controlling a current level according to the voltage between the gate and the source, a first storage capacitor which holds the voltage between the gate and a source of the driving transistor, and a light-emitting element. One data line among the plurality of data lines and one potential line among the plurality of potential lines are arranged to be adjacent to each other, and a second storage capacitor holding the potential of the one data line is formed by the one data line and the one potential line.
PIXEL DRIVING CIRCUIT AND DRIVING METHOD THEREFOR, DISPLAY PANEL AND DISPLAY DEVICE
A pixel driving circuit includes a signal control sub-circuit and a time control sub-circuit. The signal control sub-circuit includes a first driving sub-circuit connected to a first node. The signal control sub-circuit is configured to: write at least a first data signal into the first node, and enable the first driving sub-circuit to output a driving signal according to the first data signal and a first power supply voltage signal. The time control sub-circuit includes a second driving sub-circuit including a first transistor connected to a second node and the signal control sub-circuit. The time control sub-circuit is configured to: transmit a second power supply voltage signal and a third power supply voltage signal to the second node in different periods, so as to control a turn-on time of the first transistor and transmit the driving signal to an element to be driven when the first transistor is turned on.
ELECTRO-OPTICAL DEVICE HAVING A STORAGE CAPACITOR FORMED BY A DATA LINE AND A POTENTIAL LINE
An electro-optical device is provided with a plurality of data lines, a plurality of potential lines supplied with a predetermined potential, a driving transistor controlling a current level according to the voltage between the gate and the source, a first storage capacitor which holds the voltage between the gate and a source of the driving transistor, and a light-emitting element. One data line among the plurality of data lines and one potential line among the plurality of potential lines are arranged to be adjacent to each other, and a second storage capacitor holding the potential of the one data line is formed by the one data line and the one potential line.
Output amplifier and display driver integrated circuit including the same
An output amplifier includes an input unit including first and second input transistors, and a first bias transistor between a connection node of a source of the first input transistor and a source of the second input transistor and a first voltage source, a first current mirror including first and second transistors connected in series at a first connection node and between a second voltage source and a second connection node, and third and fourth transistors connected in series at a third connection node and between the second voltage source and a fourth connection node, and a second current mirror including fifth and sixth transistors between a fifth connection node and the first voltage source and connected in series at a sixth connection node, and seventh and eighth transistors between a seventh connection node and the first voltage source.
Pixel Circuit and Display Device Using Pulse-Width Generators
A pixel circuit and a display device using a pulse width modulation generator are provided. The pixel circuit has a data latch; and a pulse width modulation (PWM) generator, which is electrically coupled to the data latch, a scan line and a counter; wherein, the pulse width modulation generator is based on the pixel data, the scan signal and a counter code generated by the counter to generate a pulse width modulation (PWM) signal. Therefore, the pixel signal can be generated in a voltage and/or current mode according to the PWM signal and connected to the corresponding pixel electrode of the pixel display medium module, so that the period time for driving the display medium by accurately controlling the voltage and/or current to precisely provide grayscale function of the display.
Data receiver for achieving functions of level shifter and amplifier circuit
The disclosure provides a data receiver, including a first capacitor, a second capacitor, a first inverter and a second inverter. The first capacitor has a first terminal and a second terminal, and the first terminal receives a first input signal. The second capacitor has a third terminal and a fourth terminal, and the third terminal receives a second input signal. The first inverter has a first input terminal and a first output terminal. The second inverter has a second input terminal and a second output terminal. The first input terminal and the second output terminal are coupled to the second terminal of the first capacitor, and the second input terminal and the first output terminal are coupled to the fourth terminal of the second capacitor. The first output terminal generates a first output signal with a first output voltage, and the second output terminal generates a second output signal with a second output voltage.
ELECTRO-OPTICAL DEVICE HAVING A STORAGE CAPACITOR FORMED BY A DATA LINE AND A POTENTIAL LINE
An electro-optical device is provided with a plurality of data lines, a plurality of potential lines supplied with a predetermined potential, a driving transistor controlling a current level according to the voltage between the gate and the source, a first storage capacitor which holds the voltage between the gate and a source of the driving transistor, and a light-emitting element. One data line among the plurality of data lines and one potential line among the plurality of potential lines are arranged to be adjacent to each other, and a second storage capacitor holding the potential of the one data line is formed by the one data line and the one potential line.
Display apparatus having pixels connected to first and second wirings set to different potentials
The display apparatus includes a data generation circuit, a source driver circuit, and a pixel. The source driver circuit is electrically connected to the pixel through first and second wirings. The pixel includes a display device that is a liquid crystal device, a potential of one electrode of the display device can be a potential of the first wiring, and a potential of the other electrode of the display device can be a potential of the second wiring. The image data generation circuit has a function of generating digital image data including first and second data. One of the first and second wirings is made to have a potential corresponding to first data, and the other of the first and second wirings is made to have a potential corresponding to the second data. The potential of the first wiring and the potential of the second wiring are interchanged.
DUAL-VOLTAGE PIXEL CIRCUITRY FOR LIQUID CRYSTAL DISPLAY
Systems and methods for a digital pixel circuit for liquid crystal displays are provided. The design includes a dual-voltage pixel design, a two-transistor level-shift circuit design, self-adjusting transistor bias circuitry; and an optional on-chip test-array to determine die-specific design-center values for critical transistor leakage and threshold parameters. Level shift design simplicity, small pixel pitch, and applicability for small display applications such as microdisplays, are among the various benefits and advantages obtained.
ELECTRO-OPTICAL DEVICE HAVING A STORAGE CAPACITOR FORMED BY A DATA LINE AND A POTENTIAL LINE
An electro-optical device is provided with a plurality of data lines, a plurality of potential lines supplied with a predetermined potential, a driving transistor controlling a current level according to the voltage between the gate and the source, a first storage capacitor which holds the voltage between the gate and a source of the driving transistor, and a light-emitting element. One data line among the plurality of data lines and one potential line among the plurality of potential lines are arranged to be adjacent to each other, and a second storage capacitor holding the potential of the one data line is formed by the one data line and the one potential line.