A driving transistor is configured to control driving current for the light-emitting element. A first capacitive element and a second capacitive element are connected in series between a gate and a source of the driving transistor. A first switching transistor is configured to switch connection/disconnection between a data line and an intermediate node located between the first capacitive element and the second capacitive element. A second switching transistor is configured to switch connection/disconnection between the gate and a drain of the driving transistor. A third switching transistor is configured to switch connection/disconnection between the intermediate node and a reference power line. A fourth switching transistor is configured to switch supply/non-supply of driving current from the driving transistor to the light-emitting element. A fifth switching transistor is configured to switch connection/disconnection between an anode of the light-emitting element and a reset power line.

A second display region has a lower pixel density than a first display region. A third metal layer is located upper than a first metal layer and a second metal layer. The occupancy of the third metal layer in the second display region is lower than the occupancy in the first display region. In a pixel unit, the first metal layer includes a first electrode region to control an amount of electric current in a driving transistor, the second metal layer includes a second electrode region and a third electrode region to supply current to the driving transistor, and the third metal layer includes a main region to form a capacitor included in a capacitive element to store a control voltage for the driving transistor, and an island region surrounded by the main region with a gap and interconnected with a lower electrode region by a via region.

A display device with an imaging function is provided. A high-resolution imaging device or display device is provided. The display device includes first to third switches, first and second transistors, a capacitor, first and second wirings, and a light-emitting and light-receiving element. One electrode of the first switch is electrically connected to the first wiring, and the other electrode is electrically connected to a gate of the first transistor and one electrode of the capacitor. One electrode of the second switch is electrically connected to one of a source and a drain of the first transistor, one electrode of the light-emitting and light-receiving element, and the other electrode of the capacitor, and the other electrode of the second switch is electrically connected to a gate of the second transistor and one electrode of the third switch. The other electrode of the third switch is electrically connected to the second wiring. The light-emitting and light-receiving element has a function of emitting light of a first color and a function of receiving light of a second color.

The present disclosure is directed to display circuitry that can be formed on a flexible substrate. The circuitry includes a voltage divider formed from a first and second non-linear resistor device or a first and second transistor coupled in a diode configuration. The circuitry includes a driving thin film transistor coupled to the voltage divider. The non-linear resistor devices may include a lower electrode that is amorphous metal or a crystalline metal. The first and second transistor coupled in a diode configuration may have a lower electrode that is amorphous metal. Upper electrodes may be crystalline metal. The driving thin film transistors may have the lower electrode as amorphous or crystalline metal.

A display device includes a scan write line configured to receive a scan write signal, a scan initialization line configured to receive a scan initialization signal, a sweep signal line configured to receive a sweep signal, a first data line configured to receive a first data voltage, a second data line configured to receive a second data voltage, and a subpixel connected to the scan write line, the scan initialization line, the sweep signal line, the first data line, and the second data line. The subpixel includes a light-emitting element, a first pixel driver including a first transistor configured to generate a control current according to the first data voltage of the first data line, and a second pixel driver including an eighth transistor configured to generate a driving current applied to the light-emitting element according to the second data voltage.

A display apparatus includes a first pixel circuit and a second pixel circuit. The first pixel circuit includes a first driving transistor and a first storage capacitor having a first lower storage electrode connected to a gate of the first driving transistor and a first upper storage electrode overlapping the first lower storage electrode. The second pixel circuit includes a second driving transistor and a second storage capacitor including a second lower storage electrode connected to a gate of the second driving transistor and a second upper storage electrode overlapping the second lower storage electrode. A second overlapping area of the second lower storage electrode and the second upper storage electrode is about twice to about four times a first overlapping area of the first lower storage electrode and the first upper storage electrode.

A display device includes a substrate including a plurality of emission areas respectively corresponding to a plurality of subpixels for displaying an image, a plurality of light emitting elements respectively located in the plurality of emission areas of a first surface of the substrate and respectively corresponding to the plurality of subpixels, a first planarization layer on the first surface of the substrate and covering the plurality of light emitting elements, and an array layer on the first planarization layer.

A display device includes: a substrate; and a semiconductor layer including a driving transistor and a fourth transistor on the substrate, wherein a first electrode of the driving transistor is connected to a driving voltage line to receive a driving voltage, a first electrode of the fourth transistor is connected to a first initialization voltage line to receive a first initialization voltage, a second electrode of the fourth transistor is connected to a gate electrode of the driving transistor, a low doping region is between a channel of the fourth transistor and the first electrode of the fourth transistor, and a low doping region is not between the channel of the further transistor and the second electrode of the fourth transistor.

A display apparatus includes a plurality of pixels. A pixel includes a first capacitor connected between a first voltage line receiving a first driving signal and a first node, a first transistor comprising a control electrode connected to the first node, a first electrode connected to a second voltage line receiving a first power source signal and a second electrode connected to a second node, an organic light emitting diode comprising an anode electrode connected to the second node and a cathode electrode receiving a second power source signal, a second capacitor connected between an m-th data line and the second node (wherein, ‘m’ is a natural number) and a second transistor comprising a control electrode connected to an n-th scan line (wherein, ‘n’ is a natural number), a first electrode connected to the first node and a second electrode connected to the second node.

A display apparatus according to the present disclosure includes: a pixel array unit, pixels being arranged in the pixel unit, the pixels each including a driving transistor that includes a plurality of gate electrodes and drives a light emitting unit in response to a video signal applied to one gate electrode of the plurality of gate electrodes; and a control unit that controls gate voltage of a different gate electrode of the driving transistor. Further, an electronic apparatus according to the present disclosure includes the display apparatus having the above-mentioned configuration.