A display device includes a timing controller, a transmission line, and a source driver coupled to the timing controller via the transmission line. The source driver monitors a data rate of a pixel packet in an active area of a frame, synchronizes a clock according to the data rate to generate a synchronized clock, and clocks data in the pixel packet using the synchronized clock.

An active matrix electro-wetting on dielectric (AM-EWOD) device includes a plurality of array elements arranged in an array, each of the array elements including array element circuitry, an element electrode, and a reference electrode. The array element circuitry includes an actuation circuit configured to apply actuation voltages to the electrodes, and an impedance sensor circuit configured to sense impedance at the array element electrode to determine a droplet property at the array element. The impedance sensor circuit is operated by perturbing a potential applied to the reference electrode. The AM-EWOD device includes a common row addressing line. The impedance sensor circuit further is operated by supplying voltage signals over the common addressing line to effect both a reset operation and an operation for selecting a row in the array to be sensed. The circuitry isolates the array element from the actuation voltage during operating the impedance sensor circuit.

A pixel includes first to fourth transistors and a driving transistor. The first transistor is connected between a data line and a first node and has a gate electrode to receive a scan signal. The driving transistor is connected between the first node and a second node and has a gate electrode connected to a third node. The second transistor is connected between the second and third nodes and has a gate electrode to receive the scan signal. The third transistor is connected between first power and the first node and has a gate electrode to receive an emission signal. The fourth transistor is connected between the first and second nodes and has a gate electrode to receive an initialization signal. An organic light emitting diode is connected between the second node and second power. A storage capacitor is connected between the first power and third node.

The present invention is related to a display device, including: a plurality of sub-pixel areas, each including a pixel circuit, each pixel circuit including: a diode, configured to be in a forward-biasing state during a displaying phase of the pixel circuit for emitting light and configured to be in a reverse-biasing state in a sensing phase of the pixel circuit so as to generate a sensing voltage; a first circuit by applying gate control signals to each pixel circuit, so that each pixel circuit switches between the display phase and the sensing phase, respectively; and a second circuit including a plurality of readout circuits, each readout circuit includes an operational amplifier for reading out the sensing voltage in the sensing phase.

The present disclosure proposes a gate driver on array (GOA) driving circuit and a liquid crystal display. The GOA driving circuit includes cascaded GOA units. An Nth stage GOA unit outputs a gate driving signal to an Nth scan line on a display area. The Nth stage GOA unit includes a pull-up module, a pull-down module, a pull-up controlling module, a pull-down holding module, and a bootstrap capacitance module.

A driving method of a display panel including: providing a display panel including multiple data lines and pixel unit groups arranged in an array, each pixel unit group being divided into a first sub-pixel unit group and a second sub-pixel unit group alternately arranged along column direction, the first and the second sub-pixel unit groups each including multiple sub-pixels; in a same frame of image, the data lines scanning the first sub-pixel unit groups of the pixel unit groups; and driving signals on the data lines being performed with one time level switching and then the data lines scanning the second sub-pixel unit groups of the pixel unit groups. In the driving method of the invention, the level switching times of the driving signal on each data line is significantly decreased, the power consumption for driving the display panel can be reduced and display performance can be enhanced.

An array substrate and a manufacturing method thereof, and a display panel including the array substrate and a driving method thereof are provided. Each of the sub-pixel units of the array substrate includes a first thin film transistor and a second thin film transistor; the first thin film transistor includes a first gate electrode, a first source electrode and a first drain electrode; the second thin film transistor includes a second gate electrode, a second source electrode and a second drain electrode; each of the sub-pixel unit further includes a first pixel electrode electrically connected to the first drain electrode, a second pixel electrode electrically connected to the second drain electrode; and the first pixel electrode and the second pixel electrode are disposed in different layers and insulated with each other.

Technologies are generally described for the display of images by employing monotonic matrix factorization and sub-frame approximation image integration. In some examples, drive signals for a display device may be generated by iteratively applying a monotonic non-negative matrix factorization (NNMF) process to source image data. A given iteration of the monotonic NNMF process may result in approximation image data, partial sum image data, and residue image data, some or all of which may be further processed via subsequent iterations of the monotonic NNMF process. A generated approximation image data may then be displayed during a sub-frame time interval by selective activation of multiple row and column drivers. A series of such displayed approximation image data may effectively correspond to the original source image. In particular, the monotonic NNMF process may allow the generation of non-negative residue image data without the use of element reduction.

Disclosed are a display panel and a display device. The display panel includes a base substrate, and a first display region and a second display region that are located on the base substrate, where the first display region includes a plurality of first sub-pixels and a plurality of transparent regions, the second display region includes a plurality of second sub-pixels, and a distribution density of the first sub-pixels is smaller that of the second sub-pixels; and an area occupied by the first sub-pixels is smaller than that occupied by the second sub-pixels.

The present invention is related to a display device, including: a plurality of sub-pixel areas, each including a sub-pixel circuit, each sub-pixel circuit including: a diode, configured to be in a forward-biasing state during a displaying phase of the sub-pixel circuit for emitting light and configured to be in a reverse-biasing state for sensing light of the sub-pixel circuit in a sensing phase; a driving transistor for driving the diode during the display phase; first to sixth transistors, gate control signals are applied to gates of the first to sixth transistors, so that the sub-pixel circuit switches between the display phase and the sensing phase; and a capacitor for storing a data voltage to be written to the diode in the display phase, wherein in the sensing phase the diode generates a photocurrent to an operational amplifier so that the operational amplifier outputs a photocurrent output signal.