A display may have rows and columns of pixels. Gate lines may be used to supply gate signals to rows of the pixels. Data lines may be used to supply data signals to columns of the pixels. The data lines may include alternating even and odd data lines. Data lines may be organized in pairs each of which includes one of the odd data lines and an adjacent one of the even data lines. Demultiplexer circuitry may be configured dynamically during data loading and pixel sensing operations. During data loading, data from display driver circuitry may be supplied, alternately to odd pairs of the data lines and even pairs of the data lines. During sensing, the demultiplexer circuitry may couple a pair of the even data lines to sensing circuitry in the display driver circuitry and then may couple a pair of the odd data lines to the sensing circuitry.

A display may have rows and columns of pixels. Gate lines may be used to supply gate signals to rows of the pixels. Data lines may be used to supply data signals to columns of the pixels. The data lines may include alternating even and odd data lines. Data lines may be organized in pairs each of which includes one of the odd data lines and an adjacent one of the even data lines. Demultiplexer circuitry may be configured dynamically during data loading and pixel sensing operations. During data loading, data from display driver circuitry may be supplied, alternately to odd pairs of the data lines and even pairs of the data lines. During sensing, the demultiplexer circuitry may couple a pair of the even data lines to sensing circuitry in the display driver circuitry and then may couple a pair of the odd data lines to the sensing circuitry.

Provided are a display panel and a driving method. The display panel includes a pixel driving circuit including a drive transistor, a data write module, a light emission control module, a threshold compensation module and a bias adjustment module. The control terminal of the drive transistor is connected to the first node. The first terminal of the drive transistor is connected to a third node. The second terminal of the drive transistor is connected to a second node. The light emission control module is connected in series with the drive transistor and connected in series with a light-emitting element. The threshold compensation module is connected in series between the control terminal of the drive transistor and the second terminal of the drive transistor. The first terminal of the bias adjustment module is connected to a bias signal terminal. The second terminal is connected to the second terminal of the drive transistor.

Disclosed are a display driving circuit and a display apparatus including the same. A display driving circuit includes a first amplifier configured to drive a first data line of a display panel based on first pixel data and a second amplifier configured to drive a second data line of the display panel based on second pixel data, wherein, when a first data difference between the first pixel data and the second pixel data is greater than or equal to a data value indicating one grayscale and is less than or equal to a first threshold value, the second amplifier is turned off, and the first amplifier is configured to drive the first data line and the second data line based on the first pixel data and the second pixel data.

The present invention discloses a method for driving a pixel matrix, the pixel matrix includes a plurality of sub-pixels arranged in a matrix, the method including: receiving an image data, and acquiring original pixel data according to the image data; generating a first driving voltage and a second driving voltage according to the original pixel data; and loading the first driving voltage or the second driving voltage to the pixel matrix in a data line direction within one frame. The invention avoids crosstalk, bright and dark lines, and improves the display effect.

A pixel circuit for a display device is operable in a compensation phase, a data programming phase, and an emission phase, whereby the one horizontal time is minimized while maintaining accurate compensation of the threshold voltage of the drive transistor, and noise applied to the gate of drive transistor during the emission phase is substantially eliminated. The pixel circuit includes a drive transistor configured to control an amount of current from a power supply to a light-emitting device during the emission phase depending upon a voltage input applied to a gate of the drive transistor, and a threshold voltage of the drive transistor is compensated during the compensation phase. The pixel circuit further includes two transistors, one of which is connected between a data voltage input line and the other transistor, and the other transistor further is connected to the gate of the drive transistor, such that when the two transistors are in an on state during the data programming phase, the data voltage is applied to the gate of the drive transistor. The pixel circuit further may include another transistor that is connected between the power supply and a node N1 between the two transistors, such that during the emission phase, the power supply is applied to the node N1 to shield the drive transistor from noise from the data voltage input line.

In a liquid crystal display device (100), each pixel row group is selected by a common scan signal voltage, each pixel row group including N pixel rows which adjoin one another in a column direction. Where two pixel rows which adjoin each other in a column direction and which are included in different pixel row groups are a first pixel row and a second pixel row, the first pixel row includes a pixel which has a pixel electrode (16) capacitively coupled with a gate bus line (12) which is associated with the second pixel row. When the first pixel row is included in the q.sup.th group, the second pixel row is included in the (q+1).sup.th group. A scan signal voltage supplied to gate bus lines which are associated with the (q+1).sup.th group switches from low to high before a scan signal voltage supplied to gate bus lines which are associated with the q.sup.th group switches from high to low.

A display device according to the present disclosure includes: pixels arranged in a matrix; a data line group that includes a pair of data lines for each pixel column; a data line drive circuit that supplies a positive-phase data signal to one of the pair of data lines, and a negative-phase data signal to the other of the pair of data lines; and an auxiliary drive circuit that is provided for each pair of data lines, and that processes the positive-phase data signal and the negative-phase data signal, in which the auxiliary drive circuit has a dead zone in a region where there is no difference between a positive-phase potential and a negative-phase potential, or where the difference in potential is smaller than a predetermined value. An electronic apparatus according to the present disclosure includes a display device having the configuration described above.

A display device comprising: a first pixel row including a first pixel electrode and a second pixel electrode arranged in a first direction; a second pixel row including a third pixel electrode and a fourth pixel electrode arranged in the first direction; a third pixel row including a fifth pixel electrode and a sixth pixel electrode arranged in the first direction; a first source line and a second source line extending in the second direction between the first pixel electrode and the second pixel electrode; a first gate line extending in the first direction between the first pixel row and the second pixel row; a second gate line extending in the first direction between the second pixel row and the third pixel row; and a gate lead line extending in the second direction and connected to the first gate line and the second gate line.

An apparatus includes an active region, a source driving circuit, and a light emitting driving circuit. The active region includes an array of light emitting elements corresponding to an array of pixels arranged in M rows and N columns. The number of the array of light emitting elements is k times of the number of the array of pixels. The apparatus includes xM light emitting lines and (k/x)N source lines, wherein x is a positive fraction, and each of xM and (k/x)N is a positive integer. The source driving circuit is operatively coupled to the active region via the (k/x)N source lines and configured to write display data of a frame to the array of light emitting elements. The light emitting driving circuit is operatively coupled to the active region via the xM light emitting lines and configured to cause the array of light emitting elements to emit light.