Patent classifications
G09G2310/021
Image display systems and gate driving circuits that include a compensation circuit and shift registers
A gate driving circuit includes a plurality of shift registers arranged to output the gate driving signals in sequence. The shift registers are divided into groups arranged in sequence, wherein the driving signal from a first one of a N+1.sup.th group of shift registers is next to the driving signal from a first one of a N.sup.th group of shift registers; and at least one first compensation circuit connected to the last one of the N.sup.th group of shift registers and the first one of the N+1.sup.th group of shift registers, wherein the first compensation circuit provides a first control signal to enable the last one of the N.sup.th group of shift registers to perform signal holding, and provides a second control signal to enable the first one of the N+1.sup.th group of shift registers to perform pre-charging, wherein N is an integer greater than zero.
Flexible display device with gate-in-panel circuit
Provided are a display panel including a scan driver and a method of operating the same. The display panel includes a shift register including a plurality of stages that shifts and outputs a clock signal. A display area in the display panel is divided into a plurality of driving areas. The stages of the shift register corresponding to each driving area form a stage group. In each stage group, the stages included in the stage group sequentially output a scan signal by using an independent start signal.
Touch sensor integrated display device
The present disclosure relates to a touch sensor integrated display device capable of preventing generation of a defective image between touch/common electrodes, which includes a plurality of gate lines and a plurality of data lines intersecting the gate lines, a plurality of pixel electrodes, a plurality of touch/common electrodes and a plurality of touch/common lines. The plurality of pixel electrodes are respectively disposed in regions defined by intersections of the plurality of data lines and the plurality of gate lines and provided with data voltages. The plurality of touch/common electrodes are arranged to generate electric fields with the plurality of pixel electrodes and to correspond to parts of the plurality of pixel electrodes. The plurality of touch/common lines are respectively connected to the plurality of touch/common electrodes. Each touch/common electrode overlap with at least one gate line shared by neighboring touch/common electrodes arranged in a data line arrangement direction.
Display device and driving method for the same
A display device includes a flexible display panel, a sensing scan driver, and a sensing signal processor. The display panel includes a plurality of flexible touch input electrodes arranged in a first direction and a plurality of flexible touch output electrodes arranged in a second direction. The sensing scan driver supplies sensing input signals to the flexible touch input electrodes. The sensing signal processor receives sensing output signals through the flexible touch output electrodes. The display panel includes a plurality of touch sensing areas. One of the touch input electrodes and a pair of the touch output electrodes correspond to one of the touch sensing areas when the display panel stretches in the first direction by a predetermined first threshold value or more.
Gate driving circuit, array substrate, display panel and driving method thereof
A gate driving circuit is disclosed which includes n stages that are sequentially arranged, n being an integer larger than or equal to 4. The n stages are divided into a first, second, third and fourth sets of stages that are configured to receive respective different combinations of a first clock signal, a second clock signal, a third clock signal and a fourth clock signal. The stages in the first set of stages and the stages in the third set of stages are cascaded with each other, and the stages in the second set of stages and the stages in the fourth set of stages are cascaded with each other. Also disclosed are an array substrate including the gate driving circuit, a display panel including the array substrate, and a driving method of the display panel.
High Frame Rate Display
A display may have rows and columns of pixels. Gate lines may be used to supply gate signals to rows of the pixels. Data lines may be used to supply data signals to columns of the pixels. The data lines may include alternating even and odd data lines. Data lines may be organized in pairs each of which includes one of the odd data lines and an adjacent one of the even data lines. Demultiplexer circuitry may be configured dynamically during data loading and pixel sensing operations. During data loading, data from display driver circuitry may be supplied, alternately to odd pairs of the data lines and even pairs of the data lines. During sensing, the demultiplexer circuitry may couple a pair of the even data lines to sensing circuitry in the display driver circuitry and then may couple a pair of the odd data lines to the sensing circuitry.
High Frame Rate Display
A display may have rows and columns of pixels. Gate lines may be used to supply gate signals to rows of the pixels. Data lines may be used to supply data signals to columns of the pixels. The data lines may include alternating even and odd data lines. Data lines may be organized in pairs each of which includes one of the odd data lines and an adjacent one of the even data lines. Demultiplexer circuitry may be configured dynamically during data loading and pixel sensing operations. During data loading, data from display driver circuitry may be supplied, alternately to odd pairs of the data lines and even pairs of the data lines. During sensing, the demultiplexer circuitry may couple a pair of the even data lines to sensing circuitry in the display driver circuitry and then may couple a pair of the odd data lines to the sensing circuitry.
Light emitting display apparatus
A emitting display device can include a display panel including a plurality of pixels; a plurality of gate lines configured to supply gate signals to the pixels; and a plurality of stages connected to the plurality of gate lines, and configured to output gate pulses to a group of pixels connected to at least two gate lines among the plurality of gate lines for sensing a characteristic of each pixel among the group of pixels during a sensing period.
SHIFT REGISTER, GATE LINE DRIVING METHOD, ARRAY SUBSTRATE, AND DISPLAY APPARATUS
The present disclosure discloses a shift register, a gate line driving method, an array substrate, and a display apparatus, and belongs to the field of displays. The shift register comprises a plurality of shift register units each connected to a group of gate lines on an array substrate, wherein different shift register units are connected to different groups of gate lines, and each group of gate lines comprises at least two gate lines; and a control unit configured to control turn-on and turn-off of the gate lines, wherein the control unit is further configured to control various gate lines in a high resolution region to be turned on and turned off line by line, and control at least two adjacent gate lines in a low resolution region to be turned on and turned off synchronously.
DISPLAY PANEL DRIVING METHOD
A display panel driving method is provided and has dividing all scan lines into two scan line sets, in a displaying time of each frame sequentially scanning a first scan line set and a second scan line set, and simultaneously applying data signals of opposite polarities to pixel units connected to the first scan line set and pixel units connected to the second scan line set.