For a buck-boost DC-DC converter with n-type high-side field effect transistor (HSFET), a supply is derived from input and output rails, and this supply maintains a constant differential voltage independent of input supply voltage. The derived supply is used as the high supply (HS) of an HSFET Driver. As such, the HSFET resistance becomes independent of supply variation. A wide range ultra-low IQ (Quiescent current), edge triggered level-shifter provides support to a bootstrapped power stage of the inverting buck-boost DC-DC converter. When p-type HSFET is used, a supply is derived from the input and output supply rails, and this derived supply maintains a constant differential voltage independent to the input supply voltage. The derived supply is used as the low supply (LS) or ‘ground’ of the HSFET Driver. As such, the p-type HSFET resistance becomes independent of supply variation.

A memory cell of a memory cell array includes a well region, a first doped region, a second doped region, a first gate structure, and a storage structure. The first doped region and the second doped region are formed in the well region. The first gate structure is formed over a first surface between the first doped region and the second doped region. The storage structure is formed over a second surface and the second surface is between the first surface and the second doped region. The storage structure is covered on a portion of the first gate structure, the second surface and an isolation structure.

A new type of two-terminal magnetic memory device, referred to as antiferromagnetic voltage-controlled memory (AVM) device is disclosed. Antiferromagnetic (AFM) materials have zero magnetization, which makes it immune to external magnetic fields and opens to the possibility to implement high-density arrays without dipole coupling between adjacent devices. The AVM device combines a new state variable e.g., Néel vector l in a metallic (or non-metallic) AFM material with an electric-field-induced switching mechanism for writing of information. Utilizing electric fields E via an interfacial voltage-controlled magnetic anisotropy (VCMA) effect is a more efficient writing mechanism. The AVM device implements an antiferromagnetic tunnel junction (AFM-TJ) structure to exhibit high or low resistance states (HR, LR) corresponding to binary logic states of zero (0) or one (1). Both the AVM device structure and methods of writing a signal to the AVM device are disclosed.

Disclosed is a cell that integrates a pixel and a two-terminal non-volatile memory device. The cell can be selectively operated in write, read and functional computing modes. In the write mode, a first data value is stored the memory device. In the read mode, it is read from the memory device. In the functional computing mode, the pixel captures a second data value and a sensed change in an electrical parameter (e.g., voltage or current) on a bitline connected to the cell is a function of both the first and second data value. Also disclosed is an IC structure that includes an array of the cells and, when multiple cells in a given column are concurrently operated in the functional computing mode, the sensed total change in the electrical parameter on the bitline for the column is indicative of a result of a dot product computation.

An apparatus for reading a bit of a memory array includes a bit cell column, voltage enhancement circuitry, and control circuitry. The voltage enhancement circuitry is configured to couple a bitline to a reference node. The control circuitry is configured to, in response to a read request for a bitcell element of a plurality of bitcell elements, couple a current source to the bitcell column such that a read current from the current source flows from the source line, through the bitcell column and the voltage enhancement circuitry, to the reference node and determine a state for the bitcell element based on a voltage between the source line and the reference node. The voltage enhancement circuitry is configured to generate, when the read current flows through the voltage enhancement circuitry, a voltage at the bitline that is greater than a voltage at the reference node.

A new type of two-terminal magnetic memory device, referred to as antiferromagnetic voltage-controlled memory (AVM) device is disclosed. Antiferromagnetic (AFM) materials have zero magnetization, which makes it immune to external magnetic fields and opens to the possibility to implement high-density arrays without dipole coupling between adjacent devices. The AVM device combines a new state variable e.g., Néel vector l in a metallic (or non-metallic) AFM material with an electric-field-induced switching mechanism for writing of information. Utilizing electric fields E via an interfacial voltage-controlled magnetic anisotropy (VCMA) effect is a more efficient writing mechanism. The AVM device implements an antiferromagnetic tunnel junction (AFM-TJ) structure to exhibit high or low resistance states (HR, LR) corresponding to binary logic states of zero (0) or one (1). Both the AVM device structure and methods of writing a signal to the AVM device are disclosed.

According to one embodiment, a magnetic storage device includes a magnetoresistive element having a first end and a second end. A first switch is between the first end and a first wiring. A second switch is between the second end and a second wiring. A third switch is between the first end and a third wiring. A fourth switch is between the second end and a fourth wiring. A driver is connected to the first wiring and the second wiring and is configured to supply, to the first wiring, a current at a magnitude set based on a voltage at the first end and a voltage at the second end.

A data processing system may include a plurality of memory modules, a controller, a power supply and a plurality of switches. Each of the memory modules may include a plurality of pages. The controller may control operations of the memory modules. The power supply may provide the memory modules with a power. The switches may be arranged corresponding to each of the memory modules. The switches may be selectively driven in response to a switch drive signal from the controller.

This spin current magnetization rotational type magnetoresistive element includes a magnetoresistive effect element having a first ferromagnetic metal layer having a fixed magnetization orientation, a second ferromagnetic metal layer having a variable magnetization orientation, and a non-magnetic layer sandwiched between the first ferromagnetic metal layer and the second ferromagnetic metal layer, and spin-orbit torque wiring which extends in a direction that intersects the stacking direction of the magnetoresistive effect element, and is connected to the second ferromagnetic metal layer, wherein the electric current that flows through the magnetoresistive effect element and the electric current that flows through the spin-orbit torque wiring merge or are distributed in the portion where the magnetoresistive effect element and the spin-orbit torque wiring are connected.

The disclosed system and method reduce on-chip power IR drop caused by large write current, to increase the write IO number or improve write throughput and to suppress write voltage ripple at the start and end of a write operation. The disclosed systems and methods are described in relation to stabilizing the bit line voltage for MRAMs, however, the disclosed systems and methods can be used to stabilize the bit line voltage of any memory configuration that draws large currents during short write pulses or, more generally, to selectively assist a power supply generator in supplying adequate power to a load at times of large power consumption.