A system and method of storing and reading digital data, including providing a nanopore polymer memory (NPM) device having at least one memory cell comprising at least two addition chambers each arranged to add a unique chemical construct (or codes) to a polymer (or DNA) string when the polymer enters the respective addition chamber, the data comprising a series of codes; successively steering the polymer from deblock chambers through the nanopore into the addition chambers to add codes to the polymer to create the digital data pattern on the polymer; and accurately controlling the bit rate of the polymer using a servo controller. The device may have loading chamber(s) to load (or remove) the polymer into/from the deblock chambers through at least one micro-hole. The cell may be part of a memory system that stores and retrieves raw data and allows for remote retrieval and conversion. The cell may store multi-bit data having a plurality of states for the codes.

A resistive random access memory (Device) is disclosed. The Device includes a substrate, a first electrode formed atop the substrate, a tunneling barrier layer formed atop the first electrode, an active material formed atop the tunneling barrier layer, an isolation layer formed atop the active material, and a second electrode formed atop the isolation layer, the first electrode and the second electrode provide electrical connectivity to external components, where the active material is a phase change material which undergoes phase transition in the presence of an electric field, Joule heating, or a combination thereof.

A non-volatile memory device is described herein. The non-volatile memory device includes a diffusive memristor electrically coupled to a redox transistor. The redox transistor includes a gate, a source, and a drain, wherein the gate comprises a first storage element that acts as an ion reservoir, and a channel between the source and the drain comprises a second storage element, wherein a state of the memory device is represented by conductance of the second storage element.

Embodiments include but are not limited to apparatuses and systems including memory having a memory cell including a variable resistance memory layer, and a selector switch in direct contact with the memory cell, and configured to facilitate access to the memory cell. Other embodiments may be described and claimed.

A method of switching a phase-change device (Device), including changing phase of the Device from a semiconducting 2H phase to a new 2Hd phase with a higher conductivity, the Device having an active material with a thickness including a phase transition material to thereby transition the Device from a high resistive state (HRS) to a low resistive state (LRS) by application of a set voltage and further to return the Device from the LRS back to the HRS by application of a reset voltage.

A resistive random access memory (Device) is disclosed. The Device includes a substrate, a first electrode formed atop the substrate, a tunneling barrier layer formed atop the first electrode, an active material formed atop the tunneling barrier layer, an isolation layer formed atop the active material, and a second electrode formed atop the isolation layer, the first electrode and the second electrode provide electrical connectivity to external components, where the active material is a phase change material which undergoes phase transition in the presence of an electric field, Joule heating, or a combination thereof.

Provided is a memory- and logic device-integrated soft electronic system, the memory- and logic device-integrated soft electronic system including: a substrate 100; a plurality of bar-shaped first electrodes 110 stacked on the substrate; a resistance-variable material layer 120 coated on the lower electrode; and a plurality of bar-shaped second electrodes 130 stacked on the resistance-variable material layer 120, wherein the first electrode and the second electrode cross each other.

Several embodiments of memory devices and systems with selective page-based refresh are disclosed herein. In one embodiment, a memory device includes a controller operably coupled to a main memory having at least one memory region comprising a plurality of memory pages. The controller is configured to track, in one or more refresh schedule tables stored on the memory device and/or on a host device, a subset of memory pages in the plurality of memory pages having an refresh schedule. In some embodiments, the controller is further configured to refresh the subset of memory pages in accordance with the refresh schedule.

Methods and systems for storing digital data into peptide sequences and retrieving digital data from peptide sequences are disclosed. The method for storing digital data into peptide sequences may include: encoding the digital data into a digital code; translating the digital code into the peptide sequences; and synthesizing the translated peptide sequences. The method for retrieving digital data from peptide sequences may include: sequencing and determining an order of the peptide sequences; converting the peptide sequences with the determined order into a digital code; and decoding the digital data from the digital code. Codes with error-correction capability are developed for encoding digital data into peptide sequences, and a computational method implemented in a software is developed for sequencing the digital data bearing peptides.

An electronic switching element (1) which comprises, in this sequence, a first electrode (16), a molecular layer (18) bonded to a substrate, and a second electrode (20), where the molecular layer essentially consists of compounds of the formula I indicated in claim 1, in which a mesogenic radical is bonded to the substrate via a spacer group (Sp) by means of an anchor group (G), is suitable for the production of components (1) as memristive device for digital information storage.