The present invention relates to a test socket configured to electrically connect a tester generating a test signal and a device under inspection to each other includes a nonelastic electrically-conductive housing having a plurality of housing holes passing therethrough in a thickness direction, an insulating coating layer applied on at least an upper surface of the nonelastic electrically-conductive housing and a circumference of each of the plurality of housing hole, and an electrically-conductive part formed to have a configuration in which a plurality of electrically-conductive particles are contained in an elastic insulating material, disposed in the housing hole such that a lower end portion thereof may be connected to a signal electrode of the tester placed below the nonelastic electrically-conductive housing.

The present invention provides for an improved method and structure for forming an electrical interconnects mechanism in a Power Distribution Network (PDN) by placing capacitors on the top of the pin array on the printed circuit board (PCB) of the structure to decouple the PDN and results in lower impedance benefitting the frequency range of the PDN effecting a significant performance improvement in the spring-pin inductance from the transmission line. This reduction in impedance reduces the power supply ripple.

The present disclosure relates to a socket having a thin structure and to a spring contact suitable thereto. The socket includes: a plurality of spring contacts (100) each of which includes an upper contact pin (110), a lower contact pin (120) assembled to the upper contact pin such that the upper and lower contact pins cross each other to mutually linearly operate, and a coil spring (130) supporting the upper and lower contact pins (110 and 120); a lower film plate (310) including a plurality of first through-holes (311) through which the respective spring contacts (100) are positioned; an intermediate plate (320) provided on the lower film plate (310) and including second through-holes formed at positions corresponding to the first through-holes (311); and an upper film plate (330) provided on the intermediate plate (320) and including third through-holes formed at positions corresponding to the second through-holes.

A chip testing device and a chip testing system are provided. The chip testing system includes a chip testing device and a plurality of environment control apparatuses. A plurality of electrical connection sockets are disposed on one side of a circuit board, and a plurality of testing modules are disposed on another side of the circuit board. A first fixing member and a second fixing member fix the electrical connection sockets on one side of the circuit board, and no screwing members are required to be screwed between the electrical connection sockets and the circuit board. Each of the electrical connection sockets with a chip disposed thereon can be disposed in a high temperature environment or a low temperature environment for testing along with the chip testing device, so that each of the chips does not need to be detached repeatedly.

The contact probe comprises a barrel 50, an inspection device side terminal 60, a test board side terminal 70, and a spring 80 disposed in a state of being in contact with the test board side terminal 70 and the inspection device side terminal 60, the test board side terminal 70 includes a stop portion 74 that can abut on the caulked portion 52 in the barrel 50 and a terminal body that projects from the other end 56 of the barrel 50, and the terminal body includes, in order from a tip end, a first shaft section 71, a second shaft section 72 having a diameter larger than a diameter of the first shaft section 71, and a third shaft section 73 having a diameter smaller than the diameter of the second shaft section 72 and having at least a part that can be housed in the barrel 50.

The present invention relates to a BGA socket apparatus which is a lidless-type from which a cover, generally provided on the top part of a socket body in order for the loading/unloading operation of an IC, is removed, the BGA socket apparatus enabling the elimination of elements which may obstruct air flow during testing.

A test board includes a substrate, a socket mounted on the substrate and including a first connector pin to be connected to a first terminal of a semiconductor device when the semiconductor device is mounted in the socket, a plurality of external terminals through which a voltage or a signal is supplied to the first connector, first and second current paths that can be electrically connected between the first connector pin and one of the plurality of external terminals, and a connection mechanism. The first current path includes a first circuit element. The second current path includes no circuit element or a second circuit element that is different from the first circuit element. The connection mechanism is capable of electrically connecting the first connector pin to one of the plurality of external terminals via one of the first current path and the second current path.

A testing holder for a chip unit, a multi site holding frame for plural chip units and a method for testing a die thereof are provided. The proposed multi site holding frame for testing plural chip units simultaneously includes a first holder frame having a plurality of testing holders. Each of the plurality of testing holders includes a holder body containing a specific one of the plural chip units, and a pressure releasing device formed on the holder body to release an insertion pressure when the specific one of the plural chip units is inserted in the holder body.

An apparatus includes an input probe configured to be placed on a first cluster of u-bumps disposed on a semiconductor die, output probes configured to be respectively placed on multiple clusters of u-bumps disposed on the semiconductor die, the multiple clusters being separately connected to the first cluster. The apparatus further includes a space transformer and printed circuit board (PCB) portion including a current source configured to supply a current to the input probe placed on the first cluster, resistors having a same resistance and being connected to ground, and tester channels at which voltages are respectively measured, the tester channels being respectively connected to ends of the output probes respectively placed on the multiple clusters and being respectively connected to the resistors. The apparatus further includes a processor configured to determine whether the input probe is properly aligned with the first cluster, based on the measured voltages.

A test apparatus includes a test board, a unit, and a probe pin housed in the unit. First and second tip portions of the probe pin have the same shape as each other. A first external terminal of a first semiconductor package is brought into contact with the first tip portion of the probe pin and the second tip portion thereof is brought into contact with the terminal of the test board, thereby performing an electrical test of the first semiconductor package. Then, the unit is turned upside down and rearranged in the test apparatus. Thereafter, a second external terminal of a second semiconductor package is brought into contact with the second tip portion of the probe pin and the first tip portion thereof is brought into contact with the terminal of the test board, thereby performing an electrical test of the second semiconductor package.