Techniques are described herein that are capable of using variable voltage sources to control respective thermoelectric coolers independently in a thermal testing environment. The variable voltage sources create temperature differentials between first and second opposing surfaces of the thermoelectric coolers by applying input voltages to the respective thermoelectric coolers. Heat is transferred, by first heat exchanger(s), between a fluid and respective subset(s) of the thermoelectric coolers Heat is transferred, by second heat exchanger(s), between semiconductor device(s) and the subset(s) of the thermoelectric coolers.

One example includes a cryogenic wafer test system. The system includes a first chamber that is cooled to a cryogenic temperature and a wafer chuck confined within the first chamber. The wafer chuck can be configured to accommodate a wafer device-under-test (DUT) comprising a plurality of superconducting die. The system also includes a second chamber that is held at a non-cryogenic temperature and which comprises a wafer chuck actuator system configured to provide at least one of translational and rotational motion of the wafer chuck via mechanical linkage interconnecting the wafer chuck and the wafer chuck actuator system. The system further includes a radiation barrier arranged between the first chamber and the second chamber and through which the mechanical linkage extends, the radiation barrier being configured to provide a thermal gradient between the cryogenic temperature of the first chamber and the non-cryogenic temperature of the second chamber.

A semiconductor burn-in oven includes a housing including a burn-in chamber and an opening to the burn-in chamber surrounded by a front face, a heating device, testing circuitry, a door and a sealing mechanism. The door has an open position, in which the burn-in chamber is accessible through the opening, and a closed position, in which the door covers the opening. The sealing mechanism is configured to form a seal around the opening between an interior side of the door and the front face when the door is in the closed position. The sealing mechanism includes at least one sealing member having a recessed position, in which a gap extends between the front face and the interior side of the door, and a sealing position, in which the at least one sealing member closes the gap and forms the seal.

A semiconductor package test apparatus is provided. A semiconductor package test apparatus comprises a test board including a plurality of sensors, a chamber into which the test board is loaded, and a controller configured to control a temperature of the chamber, wherein the controller adjusts the temperature using the plurality of sensors.

A test system for a memory device includes: a chamber including at least one test socket column having a plurality of test sockets arranged in a first direction, wherein memory devices to be tested are in respective ones of the plurality of test sockets, a temperature adjusting apparatus configured to supply air into the chamber according to a temperature control signal to control a temperature of the chamber, a test device electrically connected to the test sockets and configured to test the memory devices, and a temperature controller configured to receive temperature information of the memory devices from temperature sensors of the memory devices and to output to the temperature adjusting apparatus the temperature control signal to compensate for a temperature difference between a detected temperature of the memory devices and a target temperature.

Probe systems and methods including active environmental control are disclosed herein. The methods include placing a substrate, which includes a device under test (DUT), on a support surface of a chuck. The support surface extends within a measurement environment that is at least partially surrounded by a measurement chamber. The methods further include determining a variable associated with a moisture content of the measurement environment and receiving a temperature associated with the measurement environment. The methods also include supplying a purge gas stream to the measurement chamber at a purge gas flow rate and selectively varying the purge gas flow rate such that a dew point temperature of the measurement environment is within a target dew point temperature range. The methods further include providing a test signal to the DUT and receiving a resultant signal from the DUT. The systems include probe systems that perform the methods.

An optical-electrical device can implement a feedback-based control loop for temperature of the device during component calibration. The optical-electrical device can implement compressed air to vary the device temperature during calibration. Additionally, non-active components of the device can be provided current to vary the temperature of the device in concert with the provided compressed air. Additional calibration temperatures can be implemented by activating and deactivating additional non-active components in the device, such as light sources, optical amplifiers, and modulators.

Disclosed are a test chamber and a test apparatus having the same. The test chamber includes a test compartment configured to support a plurality of test boards, each being configured to secure a test object. The test chamber applies a test signal to the test object. The test chamber includes an inlet side and a discharge side, and a supply duct vertically extending along a height of the test compartment. The supply duct supplies the inlet side of the test compartment with the test fluid. The test chamber includes a fluid controller to uniformly control a distribution of a test fluid in the supply duct and uniformly supply the test compartment with the test fluid. The disclosed test chamber and test apparatus provide a uniform test temperature and thereby improve a test reliability of a test object such as a semiconductor or semiconductor package.

A system includes a memory component and a processing device, operatively coupled with the memory component, to receive a request to perform a first test of memory components at a test platform, identify test resources of the test platform that are associated with the memory components, identify, among the test resources, a subset of test resources that are not being used by a second test of the memory components at the test platform, and assign, based on the subset of the test resources, a test resource of the test resources to obtain an assigned test resource for use by the test.

An optical-electrical device can implement a feedback-based control loop for temperature of the device during component calibration. The optical-electrical device can implement compressed air to vary the device temperature during calibration. Additionally, non-active components of the device can be provided current to vary the temperature of the device in concert with the provided compressed air. Additional calibration temperatures can be implemented by activating and deactivating additional non-active components in the device, such as light sources, optical amplifiers, and modulators.