The present invention provides a device for testing a chip, wherein the device includes a testing board and an interposer. The testing board has a plurality of pads for providing a plurality of test signals. The interposer board includes a plurality of passive components, and at least one of the passive components is coupled between a supply voltage and a ground voltage, and the supply voltage and the ground voltage are received from a power pad and a ground pad of the plurality of pads of the testing board, respectively; wherein the chip is positioned in the device, the chip receives the test signals including the supply voltage and the ground voltage from the power pad and the ground pad of the testing board, respectively.

A stand-alone active thermal interposer device for use in testing a system-in-package device under test (DUT), the active thermal interposer device includes a body layer having a first surface and a second surface, wherein the first surface is operable to be disposed adjacent to a cold plate, and a plurality of heating zones defined across a second surface of the body layer, the plurality of heating zones operable to be controlled by a thermal controller to selectively heat and maintain respective temperatures thereof, the plurality of heating zones operable to heat a plurality of areas of the DUT when the second surface of the body layer is disposed adjacent to an interface surface of the DUT during testing of the DUT.

A chip test carrier for carrying chips includes a circuit board, a positioning seat, a chip frame, and a pressing cover unit. The positioning seat includes upper and lower plates cooperating to clamp the circuit board therebetween. The upper plate includes a chip-mounting portion and an engaging slot. The chip frame is disposed on the chip-mounting portion, and is formed with frame slots for accommodating the chips, respectively. The cover unit includes a cover body connected pivotably to the positioning seat, an engaging member pivotably connected to the cover body and detachably engages the engaging slot, and pressing blocks connected to the cover body and pressing respectively against the chips.

A testing apparatus comprises a tester comprising a plurality of racks, wherein each rack comprises a plurality of slots, wherein each slot comprises: (a) an interface board affixed in a slot of a rack, wherein the interface board comprises test circuitry and a plurality of sockets, each socket operable to receive a device under test (DUT); and (b) a carrier comprising an array of DUTs, wherein the carrier is operable to displace into the slot of the rack; and (c) an array of POP memory devices, wherein each POP memory device is disposed adjacent to a respective DUT in the array of DUTs. Further, the testing apparatus comprises a pick-and-place mechanism for loading the array of DUTs into the carrier and an elevator for transporting the carrier to the slot of the rack.

An apparatus for testing a package-on-package type semiconductor package includes an upper test socket on which an upper package is mounted, the upper test socket being mounted on a pusher and connected to the lower package; a lower test socket mounted on a tester and connected to the lower package; and an adsorption pad coupled to the pusher and configured to adsorb and pressurize the lower package using a vacuum pressure, wherein the adsorption pad comprises a body part having a vacuum pressure passage formed therein; and an adsorption part having an adsorption hole corresponding to the vacuum pressure passage, and the body part is attached on a central portion of an upper surface of the adsorption part and an outer oil overflow-preventing part configured to trap silicon oil eluted from the body part is formed at an outer periphery the adsorption part.

The present disclosure relates to a test apparatus for a package-on-package type semiconductor package including a lower test socket mounted on a tester, and connected to a lower package to electrically connect the lower package to the tester; a pusher configured to be able to be moved vertically by receiving a driving force from a driving unit; an upper test socket mounted on the pusher, and having an electro-conductive part installed below the upper package to be electrically connected to the upper package; a vacuum picker mounted on the upper test socket to be able to vacuum-adsorb the lower package; and an inelastic insulating sheet installed between the upper test socket and the upper package, having a through hole formed at a position thereof corresponding to the terminal of the upper package and the electro-conductive part.

The present invention relates to a low-thermal resistance pressing device for a socket, which mainly comprises a housing, an inner collar, a heat conductive pressing block, a bearing collar and a locking member. The locking member on the housing is used to lock the socket. The inner collar is threadedly engaged with the housing. The bearing collar is located between the inner collar and the heat conductive pressing block. In the case of rotating the inner collar in the housing, the bearing collar drives the heat conductive pressing block to move axially so as to exert an axial force to a device to be tested. Because the heat conductive pressing block protrudes from the upper and lower surfaces of the housing, one end thereof can be in contact with a temperature control module, and the other end thereof can be in contact with the device to be tested.

A chip testing apparatus including a chip testing machine, a temperature testing device, and a lid is provided. The chip testing machine includes a substrate and a plurality of chip testing sockets. Each of the chip testing sockets is disposed on the substrate and configured to carry a chip under test. The temperature adjusting device is disposed on the chip testing machine, and the lid covers the temperature adjusting device and the chip testing sockets. The temperature adjusting device includes a main body and a plurality of pressing components. The main body includes a plurality of fluid channels, and each of the pressing components can press one side of one of the chips under test. A fluid can flow into one of the fluid channels and flow through the pressing components, so that the chips under test are in an environment having a predetermined temperature.

Proposed is a probe card. The probe card according to the present disclosure includes: a circuit board; a probe head having a guide plate, and through which a plurality of probes pass; and a connection member electrically connecting the circuit board and the probes to each other, wherein an insulating part of the connection member and the guide plate are made of an anodic aluminum oxide film formed by anodizing a metal as a base material.

A pogo pin-free testing device for IC chip test includes a load board, a ceramic interposer disposed on the load board, and copper core balls. The ceramic interposer has first and second surfaces and connecting points, and the second surface of the ceramic interposer faces the load board. Each connecting point has through holes penetrating the first and second surfaces, and an inner sidewall surface thereof has a metallization layer. The metallization layer is extended to a portion of the first surface and a portion of the second surface. In each of the connecting points, an area of an extending portion of the metallization layer extended to the second surface is less than an area of an extending portion of the metallization layer extended to the first surface. The copper core balls are disposed between the load board and the through holes of each connecting point of the ceramic interposer.