Various aspects of the present invention disclose a test device that includes a retaining element retaining one or more nuclear radiation sources for performing a nuclear radiation stress test of data storage structures of integrated circuits on a wafer in a wafer prober. The retaining element includes one or more apertures for applying nuclear radiation from the one or more nuclear radiation sources to the data storage structures. The retaining element is configured for controlling the nuclear radiation applied via the one or more apertures. The controlling includes a varying of relative positions of the one or more nuclear radiation sources and the one or more apertures. Additional aspects of the present invention disclose a testing method, computer program product, and computer system for performing the nuclear radiation stress test. In an example aspect, embodiments of the present invention disclose a test device for a wafer prober.

A method for selecting components in a radiation tolerant electronic system, comprising, determining ionizing radiation responses of COTS devices under various radiation conditions, selecting a subset of the COTS devices whose radiation responses satisfy threshold radiation levels, applying mathematical models of the COTS devices for post-irradiation conditions to determine radiation responses to ionizing radiation; implementing a radiation-tolerant architecture using COTS devices from the selected subset, the implemented circuit may be tested for robustness to ionizing radiation effects without repeated destructive tests of the hardware circuit by using the mathematical models for simulating response to the ionizing radiation, and implementing a multi-layer shielding to protect the implemented circuit under various radiation conditions.

An effect of PID is measured with higher accuracy by using an oscillation circuit. There is provided a semiconductor device including at least one measurement transistor a gate of which is electrically connected to an antenna unit that functions as an antenna in a plasma process, a selection transistor a source of which is electrically connected to the gate of the measurement transistor in parallel to the antenna unit; and an oscillation circuit electrically connected to a source of the measurement transistor and having an oscillation frequency that changes according to a threshold voltage of the measurement transistor.

An apparatus for testing an object may include a test chamber, a first chamber, a second chamber, and a gas supply module. The test chamber receives a test board for testing an object. The first chamber is under the test chamber and receives a lower surface of the test board. The second chamber surrounds the first chamber to isolate the first chamber from ambient air. The gas supply module supplies a dry gas to the second chamber to provide a positive pressure higher than an ambient pressure, thereby preventing the ambient air from infiltrating into the first chamber. Thus, during the testing of the object at a low temperature, the second chamber may prevent the humid ambient air from infiltrating into the first chamber to prevent condensation of water on the lower surface of the test board.

A method for testing the hermetic seal of a packaged device, which includes: a package that delimits a device chamber; and a transducer device, which is arranged within the device chamber and generates an electrical signal indicating at least one physical quantity external to the package. The testing method includes the steps of: imposing a reference pressure in the device chamber; arranging the packaged device in a testing chamber in which a testing pressure is present, different from the reference pressure; and subsequently detecting possible pressure variations within the device chamber.

An ultrasonic testing device having a packaged semiconductor device as a testing target, the device including: an ultrasonic oscillator disposed to face the semiconductor device; a pulse generator generating a driving signal that is used in the generation of an ultrasonic wave to be output from the ultrasonic oscillator; and an analysis unit analyzing an output signal that is output from the semiconductor device in accordance with the irradiation of the ultrasonic wave from the ultrasonic oscillator, in which the pulse generator sets an optimal frequency of the driving signal such that the absorption of the ultrasonic wave in the semiconductor device is maximized.

The present invention proposes a chip reliability test assembly, which comprises a motherboard and a daughter board. The motherboard is used to support the chips during an aging acceleration process at high temperature. The daughter board is used to measure the electricity of chip after the aging acceleration process. Each chip holder is removable off the motherboard. The daughter board does not go through the aging acceleration process and can be reusable.

A probe assembly and a micro vacuum probe station comprising same are disclosed. A probe assembly according to one embodiment may comprise: a base; a guide rail installed on the base; a guide member sliding along the guide rail; a probe connected to the guide member and of which one side contacts a wafer to inspect electrical properties of the wafer; and a thin film connector connected to the other side of the probe so as to supply electricity to the probe.

The disclosure relates to technology for determining stress on integrated circuits. These include using ring oscillators formed on the integrated circuit, where one ring oscillator has its frequency dependent on the current flowing through its stages being limited by its NMOS devices and another ring oscillator has its frequency dependent on the current flowing through its stages being limited by its PMOS devices. This allows the stress on the integrated circuit to be determined in different directions along the integrated circuit. A temperature sensor can be used to compensate for temperature dependence on the frequencies of the ring oscillators.

An inspection apparatus configured to inspect a target object includes an inspector configured to perform an inspection of an electrical characteristic upon the target object; a gas flow source provided within the inspector and configured to generate a gas flow which cools an inside of the inspector; a position adjuster configured to place the target object thereon and perform a position adjustment between the placed target object and the inspector; a housing which accommodates the inspector and the position adjuster in a same space; and a circulation device configured to circulate a gas by the gas flow source between the inside of the inspector and a region where the position adjuster is located within the space, the circulation device including a cooler configured to cool the gas being circulated and a foreign substance remover configured to remove a foreign substance from the gas being circulated.