A method for diagnosing a cause of failure using automated test equipment (ATE) comprises configuring a plurality of capture modules in a programmable logic device using a graphical user interface (GUI) associated with a monitoring application. The method further comprises monitoring data traffic between a device under test (DUT) and the programmable logic device using the plurality of capture modules, wherein the plurality of capture modules are programmable and operable to selectively capture data traffic to be monitored. Further, the method comprises retrieving results associated with the monitoring from respective memories associated with each of the plurality of capture modules into the monitoring application and analyzing the results upon retrieval.

Methods and apparatus for self test of safety logic in safety critical devices is provided in which the safety logic includes comparator logic coupled to a circuit under test (CUT) in a safety critical device and the self test logic is configured to test the comparator logic. The self test logic may be implemented as a single cycle parallel bit inversion approach, a multi-cycle serial bit inversion approach, or a single cycle test pattern injection approach.

A method of determining an error condition in a magnetic field sensor can include receiving a first bridge signal, the first bridge signal generated by a first full bridge circuit. The method can also include receiving a second bridge signal, the second bridge signal generated by a second full bridge circuit. The method can also include determining a bridge separation from the first bridge signal and the second bridge signal. The method can also include comparing a function of the bridge separation to a threshold value. The method can also include generating an error signal indicative of the error condition or not indicative of the error condition in response to the comparing.

A method of testing a tester, comprising testing electronic units using a plurality of sites in order to obtain first bin assignment, instructing the tester to perform a tester quality test if conditions C.sub.iQA,1 and C.sub.iQA,2 are met, the tester quality test comprising performing a second plurality of tests on an electronic unit using a first site, thereby obtaining second bin assignment for the electronic unit, the second bin assignment being representative of passing or failing of the electronic unit of the second plurality of tests with respect to at least one second test criteria, wherein C.sub.iQA,1 is met if passing first bin assignment has been obtained for said electronic unit connected to the tester using the first site, and wherein C.sub.iQA,2 is met if data representative of passing first bin assignment obtained for electronic units which have been tested on the first site, meets a quality criteria.

Embodiments are directed to a computer implemented method and system for the testing, characterization and diagnostics of integrated circuits. A system might include a device under test, such as an integrated circuit, that includes an adaptive microcontroller. The method includes loading a testing program for execution by the adaptive microcontroller, causing the microcontroller to execute the testing program. Once results from the testing program are received, the testing program can be adaptively modified based on the results. The modified testing program can be run again. The testing program can modify parameters of the integrated circuit that are not externally accessible. Other embodiments are also disclosed.

A method of testing a tester, comprising testing electronic units using a plurality of sites in order to obtain first bin assignment, instructing the tester to perform a tester quality test if conditions C.sub.iQA,1 and C.sub.iQA,2 are met, the tester quality test comprising performing a second plurality of tests on an electronic unit using a first site, thereby obtaining second bin assignment for the electronic unit, the second bin assignment being representative of passing or failing of the electronic unit of the second plurality of tests with respect to at least one second test criteria, wherein C.sub.iQA,1 is met if passing first bin assignment has been obtained for said electronic unit connected to the tester using the first site, and wherein C.sub.iQA,2 is met if data representative of passing first bin assignment obtained for electronic units which have been tested on the first site, meets a quality criteria.

A battery monitoring system includes a plurality of battery monitoring devices connected in series, such that each battery monitoring device is in communication with at least one adjacent battery monitoring device, and each battery monitoring device monitors battery cells. First and second interface devices are located along first and second communication paths including the battery monitoring devices. A controller controls the first and second interface devices to switch transmission modes between transmitting along the first communication path via the first interface device and the battery monitoring devices, transmitting along the second communication path via the second interface device and the battery monitoring devices, and transmitting along a third transmission mode in which a direction of the communication signals outputted from the first interface device and the second interface device to the plurality of battery monitoring devices are reversed.

Device under test (DUT) interface device for use in a system for executing measurements on a device under test (9) with a vector network analyser (11).

The DUT interface device comprises a divider/coupler component (4), a variable gain amplifier (5), an I/Q mixer (6) and a bridge/coupler component (7) and provides a test signal (a) to the DUT terminal (3).

The system further comprises a control unit (12) connected to the vector network analyser (11) and to control input terminals (8) of associated ones of the at least one DUT interface device (1). The control unit (12) provides quadrature control signals (V.sub.I, V.sub.Q) for the associated at least one DUT interface device (1), which are connected directly to the device under test (9). The present invention further relates to proper calibration and measurement methods.

A self-diagnosis circuit (BST1) configured to diagnose a fault detection circuit (20) including a first comparator (CMP1) configured to be fed with a voltage based on a fault sensing target voltage (Vo1) and a first reference voltage (Vref1) includes a voltage switch circuit (50) configured to switch the level of a voltage based on a second reference voltage (Vref2) and output the resulting voltage, a first path switch circuit (51) configured to switch between a path through which the voltage output from the voltage switch circuit is fed to the first comparator and a path through which the voltage based on the fault sensing target voltage is fed to the first comparator, and a control circuit (15) configured to control the voltage switch circuit and the path switch circuit.

A method of determining an error condition in a magnetic field sensor can include receiving a first bridge signal, the first bridge signal generated by a first full bridge circuit. The method can also include receiving a second bridge signal, the second bridge signal generated by a second full bridge circuit. The method can also include determining a bridge separation from the first bridge signal and the second bridge signal. The method can also include comparing a function of the bridge separation to a threshold value. The method can also include generating an error signal indicative of the error condition or not indicative of the error condition in response to the comparing.