According to one embodiment, a display device includes a gate line extending in a first direction, first and second source lines crossing the gate line and arranged in the first direction, a first light-shielding layer having first and second openings, and an oxide semiconductor layer crossing the gate line, and in the display device, the first opening and the second opening are arranged in a second direction crossing the first direction between the first source line and the second source line, the gate line is located between the first opening and the second opening, and the oxide semiconductor layer has a first overlapping portion overlapping the first opening.

A display device includes a substrate; at least one data line disposed on the substrate; a first pattern disposed on the substrate and spaced apart from the data line; a first insulating layer at least partially disposed on the data line and the first pattern; an active layer disposed on the first insulating layer and at least partially overlapping with the first pattern; a first gate insulating layer disposed on the active layer; and a first electrode disposed on the first gate insulating layer and overlapping with the active layer, wherein the first electrode does not overlap with the data line in a direction parallel to an upper surface of the first insulating layer.

A display substrate is provided, including: a base (1); and a plurality of pixel units (10) located on the base (1) and arranged in an array, where the display substrate further includes a plurality of data lines (25), and for each of the plurality of data lines (25), the data line (25) extends along a column direction and is located between adjacent first pixel unit (10A) and second pixel unit (10B) in a row direction, the data line (25) is arranged in a different layer from a first pixel electrode (40A) of the first pixel unit (10A) and a second pixel electrode (40B) of the second pixel unit (10B), and the data line (25) includes a first branch line (252) and a second branch line (253) that are connected in parallel and extend in the column direction; an orthographic projection of the first branch line (252) on the base (1) at least partially overlaps with an orthographic projection of the first pixel electrode (40A) on the base (1); an orthographic projection of the second branch line (253) on the base (1) at least partially overlaps with an orthographic projection of the second pixel electrode (40B) on the base (1). A display panel and a method of manufacturing a display substrate are further provided.

A display substrate includes: a first base substrate (20), and gate lines (4) and data lines (5) on the first base substrate (20). The gate lines (4) extend in a first direction (X), and the data lines (5) extend in a second direction (Y). The gate lines (4) and the data lines (5) define pixel units, each of which includes a thin film transistor (7), a pixel electrode (8) and a common electrode (9). At least some of the pixel units are respectively configured with conductive bridge lines (10) provided in the same layer as the pixel electrode (8). In a pixel unit configured with the conductive bridge line (10), a first hollowed-out structure (13) and a second hollowed-out structure (14) are provided on opposite sides of the pixel electrode (8) in the first direction, to weaken or even eliminate mura (e.g., nonuniformity in brightness or color).

An array substrate having a plurality of subpixels is provided. In a respective one of the plurality of subpixels, the array substrate includes a base substrate; and a thin film transistor on the base substrate. The thin film transistor includes a gate electrode, a source electrode, and a drain electrode. The drain electrode includes a first portion, a second portion, and a third portion connecting the first portion and the second portion. An orthographic projection of the first portion on the base substrate at least partially overlaps with an orthographic projection of a first gate line protrusion of a respective one of the plurality of gate lines on the base substrate. An orthographic projection of the second portion on the base substrate at least partially overlaps with an orthographic projection of a second gate line protrusion of the respective one of the plurality of gate lines on the base substrate.

A display device is provided and includes first signal line between first and second pixel areas in first direction; first switching element in first pixel area, first switching element including first relay electrode in first pixel area; second switching element in second pixel area, second switching element including second relay electrode in second pixel area; first pixel electrode in the first pixel area; and second pixel electrode in second pixel area, wherein first pixel electrode includes first connector, second pixel electrode includes second connector, first and second connectors are arranged in first direction with first signal line interposed therebetween, gap width between first connector and first signal line is different from gap width between first signal line and second connector, and gap width between first relay electrode and first signal line is different from gap width between first signal line and second relay electrode.

A display panel including sub-pixels, first and second scan lines, first and second data lines, and first to fourth auxiliary lines is provided. The sub-pixels are arranged into first rows arranged in a first direction and second rows arranged in a second direction. Each third auxiliary line is electrically connected to a second auxiliary line and a first auxiliary line electrically connected to a first scan line. Each fourth auxiliary line is electrically connected to a second scan line and a first scan line. There are at least 2n second rows between each third auxiliary line and the first scan line electrically connected thereto, there are at least 2n+1 second rows between each third auxiliary line and the second scan line electrically connected thereto, and n is a positive integer.

A driver circuit includes first to third transistors, a first circuit, and a second circuit. In the first transistor, a first terminal is electrically connected to a second wiring, a second terminal is electrically connected to a first wiring, and a gate is electrically connected to the second circuit and a first terminal of the third transistor. In the second transistor, a first terminal is electrically connected to the first wiring, a second terminal is electrically connected to a sixth wiring, a gate is electrically connected to the first circuit and a gate of the third transistor. A second terminal of the third transistor is electrically connected to the sixth wiring. The first circuit is electrically connected to a third wiring, a fourth wiring, a fifth wiring, and the sixth wiring. The second circuit is electrically connected to the first wiring, the second wiring, and the sixth wiring.

An array substrate and a display device is disclosed. The array substrate includes a base substrate, a plurality of gate lines and a plurality of data lines arranged to intersect each other on the base substrate, a pixel electrode arranged in a region defined by an adjacent gate line and an adjacent data line, and a thin film transistor arranged at an intersection of the gate lines and the data lines. A drain of the thin film transistor is connected with the pixel electrode through a via hole. The gate lines further include a widening portion between adjacent data lines. The widening portion comprises a recess structure. An orthogonal projection of the recess structure on the base substrate at least partly overlaps that of the drain of the thin film transistor on the base substrate.

A display device in which parasitic capacitance between wirings can be reduced is provided. Furthermore, a display device in which display quality is improved is provided. Furthermore, a display device in which power consumption can be reduced is provided. The display device includes a signal line, a scan line, a first electrode, a second electrode, a third electrode, a first pixel electrode, a second pixel electrode, and a semiconductor film. The signal line intersects with the scan line, the first electrode is electrically connected to the signal line, the first electrode has a region overlapping with the scan line, the second electrode faces the first electrode, the third electrode faces the first electrode, the first pixel electrode is electrically connected to the second electrode, the second pixel electrode is electrically connected to the third electrode, the semiconductor film is in contact with the first electrode, the second electrode, and the third electrode, and the semiconductor film is provided between the scan line and the first electrode to the third electrode.