The present disclosure provides a liquid crystal display panel and a display device. The liquid crystal display panel includes an array substrate. A hollow structure is defined in a common electrode layer. The hollow structure includes a first hollow structure corresponding to a display area. An area of the first hollow structure progressively increases along a direction from an array routing area to the display area, so that an area of the common electrode layer corresponding to the display area progressively decreases along the direction from the array routing area to the display area, thereby making RC loadings uniform and keeping charging rates in various areas same.

A liquid crystal display includes first and second gate lines and first and second data lines, on a first substrate, a first thin film transistor connected to the first gate and data lines and including a first source and drain electrode, a second thin film transistor connected to the second gate and data lines and including a second source and drain electrode, first and second pixel electrodes contacting a portion of the first and second drain electrodes, respectively, a passivation layer on the first and second pixel electrodes and the first and second thin film transistors, and a reference electrode on a passivation layer and overlapping the first pixel electrode and the second pixel electrode. The reference electrode includes a plurality of branch electrodes. The first thin film transistor is right of the first data line and the second thin film transistor is left of the second data line.

A display device includes a plurality of pixel electrodes disposed so that the numbers of pixel electrodes arranged in a column-wise direction vary according to locations in a row-wise direction, a plurality of image lines having lengths corresponding to the numbers of pixel electrodes arranged in the column-wise direction, a common electrode partially disposed in an area outside the display area, a common wire supplies a common potential signal to the common electrode, a plurality of image lead wires drawn from the plurality of image lines into the area outside the display area and disposed to intersect the common wire, and a plurality of capacitance forming sections connected to the plurality of image lead wires in the area outside the display area and disposed to overlap at least either the common electrode or the common wire via at least either of insulating films.

A dual-gate array substrate includes: a plurality of gate lines arranged in a first direction and each extended in a second direction that is perpendicular to the first direction; a plurality of primary signal lines and secondary signal lines arranged alternately in the second direction and extended in the first direction; and a plurality of pixel units. The primary signal lines are connected to a drive unit, and connected respectively to the pixel units that are adjacent thereto. Common electrodes include a plurality of main electrodes and a plurality of branching electrodes. An orthographic projection of the main electrode on the dual-gate array substrate does not overlap with those of corresponding ones, adjacent to the main electrode, of the pixel electrodes and at least covers the primary signal line. Each gate line includes a protrusion protruded in the first direction.

A display device includes a substrate; at least one data line disposed on the substrate; a first pattern disposed on the substrate and spaced apart from the data line; a first insulating layer at least partially disposed on the data line and the first pattern; an active layer disposed on the first insulating layer and at least partially overlapping with the first pattern; a first gate insulating layer disposed on the active layer; and a first electrode disposed on the first gate insulating layer and overlapping with the active layer, wherein the first electrode does not overlap with the data line in a direction parallel to an upper surface of the first insulating layer.

Disclosed in the disclosure are a display panel and a display device. The display panel includes: a first base substrate; a plurality of scan signal lines arranged on a side of the first base substrate; a plurality of data signal lines arranged on sides, facing away from the first base substrate, of the scan signal lines; and first shielding parts arranged on sides, facing away from the scan signal lines, of the data signal lines, wherein each first shielding part is of a strip structure, and in each sub-pixel unit, both sides of the data signal line are each provided with one first shielding part.

According to one embodiment, a semiconductor substrate including, a switching element, a first organic insulating film, first and second metal lines arranged in a first direction and extending in a second direction, and a metal electrode located between the first and second metal lines. The first organic insulating film includes first and second surfaces. The switching element is covered with the first surface. The first and second metal lines and the metal electrode are located on the second surface side. The first metal line includes a first portion extending in the second direction and a second portion having a width larger than a width of the first portion. The second portion includes arcuate first and second edge. The metal electrode has a polygonal shape having n corners or an elliptic shape where n is larger than four.

A display device includes a first transistor provided with an oxide semiconductor layer, a first gate wiring facing the oxide semiconductor layer and a first gate insulating layer between the oxide semiconductor layer and the first gate wiring, a first transparent conductive layer provided on at least a first insulating layer on the first transistor, the first transparent conductive layer having an area overlapping the gate wiring and being in contact with the oxide semiconductor layer in a first contact area not overlapping the gate wiring, a second transparent conductive layer provided above at least a second insulating layer on the first transparent conductive layer and being in contact with the first transparent conductive layer at a second contact area overlapping the gate wiring, and a third transparent conductive layer provided between the second transparent conductive layer and the second insulating layer.

Embodiments disclosed herein relate to a touch display panel and a touch display device. By arranging a shielding structure, which is connected to a touch electrode in a region where a touch line and a data line overlap each other or is applied with a shielding signal corresponding to a touch driving signal from an outside circuit, between the touch line and the data line, it is possible to prevent direct capacitance from being formed between the touch line and the data line, and to prevent the capacitance formed due to the data line from causing noise on a touch sensing signal. In addition, by arranging a touch load reduction layer between the shielding structure and the touch line, it is also possible to reduce the capacitance between the touch line and the data line arranged in the horizontal direction, thereby improving touch sensing performance.

A display panel and a display device are provided. The display panel comprises a first substrate and a second substrate provided opposite to each other. The first substrate comprises M*N subpixels defined by gate lines and data lines. Thin film transistors in the k-th display row are connected to a first data line, and thin film transistors in the (k+1)-th display row are connected to a second data line. The second substrate comprises M*N filter units, a black matrix is provided between adjacent filter units, and the black matrix comprises shielding rows and shielding columns. The shielding row located between the k-th display row and the (k+1)-th display row has a first width, the shielding row located between the (k+1)-th display row and the (k+2)-th display row has a second width, and the first width is not equal to the second width. The display device comprises a display panel.