The disclosure relates to a display substrate. The display substrate may include a semiconductor pattern and a first conductive pattern stacked on a base substrate, and a second conductive pattern electrically connected to the first conductive pattern. A first orthographic projection of the first conductive pattern on the base substrate may fall within a second orthographic projection of the semiconductor pattern on the base substrate, and a distance between the second orthographic projection and a fourth orthographic projection of a display electrode of the display substrate on the base substrate ma be greater than a distance between a third orthographic projection of the second conductive pattern on the base substrate and the fourth orthographic projection.

An array substrate having a plurality of subpixels is provided. In a respective one of the plurality of subpixels, the array substrate includes a base substrate; and a thin film transistor on the base substrate. The thin film transistor includes a gate electrode, a source electrode, and a drain electrode. The drain electrode includes a first portion, a second portion, and a third portion connecting the first portion and the second portion. An orthographic projection of the first portion on the base substrate at least partially overlaps with an orthographic projection of a first gate line protrusion of a respective one of the plurality of gate lines on the base substrate. An orthographic projection of the second portion on the base substrate at least partially overlaps with an orthographic projection of a second gate line protrusion of the respective one of the plurality of gate lines on the base substrate.

A display panel has an odd-shaped active area and a peripheral area. The display panel includes a substrate, pixel units, gate lines and at least one dummy thin film transistor. The pixel units are disposed on the active area of the substrate. The gate lines are disposed on the substrate, each of the gate lines is coupled to one or more of the pixel units, and the number of pixel units coupled to a first gate line of the gate lines is smaller than the number of pixel units a second gate line coupled to of the gate lines. The dummy thin film transistor is disposed on the substrate, and is coupled to the first gate line.

The display device includes a first substrate; an active layer disposed on the first substrate; a first insulation layer disposed on the active layer; a first electrode layer disposed on the first insulation layer including a gate electrode line extending along a first direction and a protruding portion extending along a second direction; a second insulation layer disposed on the first electrode layer; and a second electrode layer disposed on the second insulation layer. The second electrode layer includes a date line extending along the second direction and a conductive layer. The conductive layer includes a first conductive portion and a second conductive portion, wherein the first conductive portion has a first maximum width A along the first direction, and the second conductive portion has a second maximum width B along the first direction. The first maximum width A is less than the second maximum width B.

An array substrate, a manufacturing method thereof, and a display device are disclosed. The array substrate includes: a base substrate; a gate line located on the base substrate and extending in a first direction; a data line located on the base substrate and extending in a second direction; the gate line and the data line crossing each other to define an orthographic projection of a pixel region on the base substrate; an organic film located on the gate line and the data line and located in the pixel region; and a pixel electrode located on the organic film in the pixel region. The organic film located directly above the data line has a first thickness, the organic film located directly below the pixel electrode has a second thickness, and the first thickness is greater than the second thickness.

The present application discloses an array substrate having a plurality of thin film transistors, a display apparatus, and a method of fabricating an array substrate. The array substrate includes a base substrate; a semiconductor layer on the base substrate and including a plurality of active layers respectively for the plurality of thin film transistors; and an electrostatic discharging layer electrically connected to the semiconductor layer and configured to discharge electrostatic charge in the semiconductor layer.

A liquid crystal display panel and a display device are provided. The liquid crystal display panel includes an array substrate and a color filter substrate disposed oppositely, and liquid crystals. The array substrate includes common electrode lines, gate electrodes, and a transparent electrode layer. In a direction parallel to a plane where the array substrate is located, spacing areas are provided between the common electrode lines and the gate electrodes; the transparent electrode layer includes shading electrodes and pixel electrodes, the shading electrodes and the pixel electrodes are electrically connected, and the shading electrodes cover the spacing areas.

A display device comprises a first pixel including a first transistor including a first control electrode, a first input electrode, and a first output electrode spaced apart from the first input electrode and a first pixel electrode connected to the first output electrode, a second pixel adjacent to the first pixel in a first direction and including a second transistor including a second control electrode, a second input electrode, and a second output electrode spaced apart from the second input electrode and a second pixel electrode connected to the second output electrode, and a scan line for providing a scan signal to the first and second control electrodes. The first and second input electrodes are disposed in a second direction intersecting the first direction from the first and second output electrodes, respectively, and the first input electrode includes a first extension portion extending toward the second output electrode.

A liquid crystal display is provided and includes first and second substrates and liquid crystal layer therebetween; pixel electrode on first substrate; pedestal metal coupled to pixel electrode; semiconductor layer substantially U-shaped and coupled to pedestal metal at first coupling portion; scan line that extends in first direction and in layer different from semiconductor layer; signal line that extends in second direction different from first direction so as to three-dimensionally cross scan line, signal line being coupled to semiconductor layer at second coupling portion; and extending portion that is part of scan line and that protrudes from scan line, the extending portion extending along signal line, wherein: in first direction along a shorter side of each pixel unit, extending portion is adjacent to pedestal metal; and in second direction along a longer side of each pixel unit, length of extending portion is smaller than length of pedestal metal.

The present disclosure provides a display panel and a display device. The display panel includes a display region; the display region includes a first display region and a second display region arranged in a second direction; each scanning signal line in the first display region is electrically connected with less pixels than each scanning signal line in the second display region; the first display region is divided into a first sub-display region and a second sub-display region arranged in the second direction; and the first sub-display region is located at the side far away from the second display region.