A display device having a display region and a peripheral region in contact with the display region above a substrate is provided. The display region has a plurality of pixels each including a transistor, an insulating film above the transistor, a pixel electrode arranged above the insulating film and electrically connected to the transistor, and a common electrode above the insulating film, a video signal line and a gate signal line electrically connected to the transistor, and liquid crystal layer above the plurality of pixels. The peripheral region has a terminal electrically connected to the video signal line, a wiring arranged parallel to the gate wiring between the display region and the terminal, and a plurality of first electrodes above the wiring. The insulating film covers the wiring, and the wiring is electrically connected to the plurality of first electrodes via an opening in the insulating film.

The present invention provides a LCOS structure and a method for fabricating same. The LCOS structure includes: a silicon substrate; a liquid crystal layer and a transparent conductive layer both disposed above the silicon substrate. In the silicon substrate, there are formed a conductive pad, an opening where the conductive pad is exposed, and at least one metal layer. The opening is located peripherally around the liquid crystal layer, there is no portion of the metal layer located under the conductive pad. The conductive backing is located at the same vertical level as one metal layer in the at least one metal layer and electrically connected thereto, a conductive adhesive fills in the opening and a gap between the silicon substrate and the transparent conductive layer. The transparent conductive layer is electrically connected to the conductive pad by conductive metal particles in the conductive adhesive.

A display device may include a display panel having a display area and a non-display area located in a first direction from the display area, a printed circuit board located in the first direction from the non-display area and configured to generate a signal, a driving film connected to the non-display area of the display panel and configured to drive the display panel in response to the signal, and a connecting film having a first end connected to the non-display area of the display panel and a second end connected to the printed circuit board. The connecting film electrically connects the printed circuit board and the driving film.

Provided herein are encoded microcarriers for analyte detection in multiplex assays. The microcarriers are encoded with an analog code for identification and include a capture agent for analyte detection. Also provided are methods of making the encoded microcarriers disclosed herein. Further provided are methods and kits for conducting a multiplex assay using the microcarriers described herein.

Provided herein are encoded microcarriers for analyte detection in multiplex assays. The microcarriers are encoded with an analog code for identification and include a capture agent for analyte detection. Also provided are methods of making the encoded microcarriers disclosed herein. Further provided are methods and kits for conducting a multiplex assay using the microcarriers described herein.

An active matrix substrate is provided with a plurality of oxide semiconductor TFTs including a plurality of first TFTs. An oxide semiconductor layer of each oxide semiconductor TFT includes a channel region, a source contact region, and a drain contact region. In a view from a normal direction of the substrate, the channel region is a region located between the source contact region and the drain contact region and overlapping a gate electrode, and the channel region includes a first end portion and a second end portion that oppose each other and extend in a first direction from the source contact region side toward the drain contact region side, a source side end portion that is located on the source contact region side of the first and second end portions and extends in a second direction that intersects the first direction, and a drain side end portion that is located on the drain contact region side of the first and second end portions and extends in the second direction. Each first TFT further includes a light blocking layer located between the oxide semiconductor layer and the substrate. In a view from the normal direction of the substrate, the light blocking layer includes an opening region that overlaps part of the channel region and a light blocking region that overlaps another part of the channel region. In a view from the normal direction of the substrate, the light blocking region includes a first light blocking portion that extends in the first direction over the first end portion of the channel region and a second light blocking portion that extends in the first direction over the second end portion of the channel region; each of the first light blocking portion and the second light blocking portion includes a first edge portion and a second edge portion that oppose each other and extend in the first direction; at least part of the first edge portion overlaps the channel region; and the second edge portion is located on an outer side of the channel region and does not overlap the channel region.

The present disclosure relates to a display device. A display device according to an embodiment of the present inventive concept includes gate lines extending along a first direction, data lines extending along a second direction, pixels including pixel electrodes, each of the pixels including a transistor connected to a gate line and a data line, and a pixel electrode connected to the transistor, the pixels including a first pixel which includes a first pixel electrode connected to a first data line and is disposed in n.sup.th pixel row and m.sup.th pixel column, and a second pixel which includes a second pixel electrode connected to the first data line or a second data line disposed adjacent to the first data line and is disposed in (n+1).sup.th pixel row and the m.sup.th pixel column. The first data line does not overlap the first pixel electrode and overlaps the second pixel electrode.

According to an aspect, a display device includes: an array substrate having a display region provided with a plurality of signal lines arranged with spaces in a first direction and a plurality of scanning lines arranged with spaces in a second direction; a counter substrate; a liquid crystal layer between the array substrate and the counter substrate; and a light source disposed so as to cause light to enter a side surface of the array substrate or a side surface of the counter substrate. The counter substrate is provided with a light-blocking layer. In a plan view, the light-blocking layer overlaps either of the signal lines and the scanning lines, and the other of the signal lines and the scanning lines each have a non-overlapping portion that does not overlap the light-blocking layer.

A display substrate includes a first base, touch signal lines and touch units. The touch signal lines are disposed on a side of the first base, and lengths of at least two touch signal lines decrease in sequence. The touch units are disposed on a side of the touch signal lines away from the first base, and a touch unit is electrically connected to a touch signal line. Resistances of at least two touch units increase in sequence, and the at least two touch units in an increase order of the resistances in sequence are electrically connected to the at least two touch signal lines in a decrease order of the lengths in sequence, respectively. The touch units each include a touch electrode, and at least one of the at least two touch units further includes an auxiliary electrode stacked with and electrically connected to a touch electrode.

Provided are an array substrate and a manufacturing method thereof, and a display device. The array substrate comprises a plurality of data lines and sub-pixels. At least one sub-pixel comprises: a first insulating layer; a gate; an active layer located on one side of the first insulating layer away from the gate; a pixel electrode; a first electrode located connected to the active layer and in contact with the pixel electrode; a second electrode connected to the active layer and a data line; a second insulating layer having a first opening, wherein the orthographic projection of the first opening partially overlaps with the orthographic projections of the pixel electrode and the first electrode; a connection electrode in contact with the pixel electrode and the first electrode through the first opening; and a common electrode located on one side of the second insulating layer away from the pixel electrode.