A liquid crystal display includes a pixel electrode including a first subpixel electrode and a second subpixel electrode spaced apart with a gap therebetween, a common electrode facing the pixel electrode, and a liquid crystal layer formed between the pixel electrode and the common electrode and including a plurality of liquid crystal molecules. The first and second subpixel electrodes include a plurality of branches, and each of the first and second subpixel electrodes includes a plurality of subregions. The branches extend in different directions in different subregions.

Disclosed are an in-cell touch liquid crystal display (LCD) device based on a twisted nematic (TN) mode, a method of manufacturing the same, a method of manufacturing a thin film transistor (TFT) array substrate, and a method of manufacturing a color filter array substrate. The TFT array substrate includes a TFT disposed in a pixel area defined by an intersecting gate line and data line, a conductive line disposed on the TFT, and a transparent conductive layer in electrical contact with the conductive line. The color filter array substrate includes a light shield layer, a color filter, an overcoat layer covering the light shield layer and the color filter, a column spacer disposed on the overcoat layer, and a common electrode disposed on the overcoat layer and the column spacer, where the conductive line supplies the common electrode with a common voltage or a touch driving signal.

An array substrate includes a glass substrate GS, an alignment mark 29, and first traces 19. The glass substrate GS has a corner portion 30 having an outline defined by a first edge portion 11b1 and a second edge portion 11b2 crossing the first edge portion 11b1. The alignment mark 29 is disposed at the corner portion 30 and used as the positioning index in mounting a driver 21 and a flexible printed circuit board 13. The alignment mark 29 at least includes first and second side portions 29a, 29b parallel to the first and second edge portions 11b1, 11b2, respectively. One end of the second side portion 29b is continuous to one end of the first side portion 29a. The alignment mark 29 has an outline that is on a same plane with a reference line BL connecting other ends of the first side portion 29a and the second side portion 29b linearly. The first traces 19 include inclined portions 31 that are inclined with respect to the first and second side portions 29a, 29b along the reference line BL.

A display panel and the method of manufacturing the same, includes a first substrate disposed relatively to a second substrate, disposed above the first substrate. A black matrix, a poly silicon layer, a gate layer and a source drain layer disposed successively on the first substrate along direction facing the second substrate. The black matrix shelters the surrounding light which is incident from the first substrate onto the poly crystal layer, and the gate layer and the source-drain layer shelter the backlight which is incident from the second substrate onto the poly crystal layer. The manufacturing method of the display panel of the present invention could be simplified by the method described above.

Disclosed are an oxide thin film transistor (TFT), a method of manufacturing the same, and a display panel and a display device using the same, in which a first conductor and a second conductor are provided at end portions of a semiconductor layer formed of oxide semiconductor. The first conductor and second conductor are electrically connected to a first electrode and a second electrode, and covered by a gate insulation layer. The oxide TFT includes a semiconductor layer provided on a buffer and including an oxide semiconductor, a gate insulation layer covering the semiconductor layer and the buffer, a gate electrode provided on the gate insulation layer to overlap a portion of the semiconductor layer, and a passivation layer covering the gate and the gate insulation layer.

A method for manufacturing a touch panel includes the following steps. A plurality of first sensing electrodes and a plurality of second sensing electrodes are formed on the first substrate. A first insulator layer is formed to cover the first sensing electrodes and the second sensing electrodes. Holes are formed in the first insulator layer, in which a portion of the first sensing electrodes is exposed through the holes. A conductive layer is formed on the first insulator layer and in the holes. The conductive layer is patterned to form a bridge electrode and a shield electrode. The bridge electrode is electrically connected to the first sensing electrodes through the holes. A vertical projection of the shield electrode on the first substrate at least overlaps with a vertical projection of at least one of the first sensing electrodes and the second sensing electrodes on the first substrate.

Disclosed are a spatial light modulator and a display device, where 2*2 adjacent pixel electrodes are a pixel group, through-holes corresponding to the respective pixel electrodes are located proximate to the center of the pixel group, and a photo spacer is located at the center of the pixel group, so that the photo spacer can overlap with the through-holes, or the photo spacer can be arranged in close proximity to the through-holes. If the photo spacer overlaps with the through-holes, then a black matrix layer covering the photo spacer, and a black matrix layer covering the surrounding of the photo spacer may cover at least a part of the through-holes; and if the photo spacer is arranged in close proximity to the through-holes, then the black matrix layer covering the surrounding of the photo spacer may cover at least a part of the through-holes.

A display device including a substrate, a gate line, a data line, a plurality of thin film transistors, a first pixel electrode, and a second pixel electrode. The gate line is disposed on the substrate. The data line is disposed on the substrate. The data line includes a first branch line and a second branch line. The first branch line and the second branch line form a closed loop. The plurality of thin film transistors is connected to the data line. The first pixel electrode is connected to at least one of the plurality of thin film transistors. The second pixel electrode is connected to at least another one of the plurality of thin film transisters. The first pixel electrode and the second pixel electrode are arranged in a substantially diagonal direction with respect to each another. The first branch line is connected to a source electrode of said at least one of the plurality of thin film transistors. The second branch line is connected to a source electrode of said at least another one of the plurality of thin film transistors.

Provided is a digital circuit (30) that comprises: a switching circuit (31) having first transistors (32, 33) supplied with power supply potentials (VDD, VSS): correcting circuits (34, 36) connected between an input terminal (IN) inputted with an input signal and control terminals (gates) of the first transistors; capacitors (C2, C3) connected between the control terminals and the input terminal; diode-connected second transistors (35, 37) that are provided between nodes (N5, N6) between the capacitors and the control terminals and the power supply potentials and have the substantially same threshold voltage as the first transistors; and switches (SW2, SW3) connected in series with the second transistors.

A method of manufacturing, with high mass productivity, liquid crystal display devices having highly reliable thin film transistors with excellent electric characteristics is provided. In a liquid crystal display device having an inverted staggered thin film transistor, the inverted staggered thin film transistor is formed as follows: a gate insulating film is formed over a gate electrode; a microcrystalline semiconductor film which functions as a channel formation region is formed over the gate insulating film; a buffer layer is formed over the microcrystalline semiconductor film; a pair of source and drain regions are formed over the buffer layer; and a pair of source and drain electrodes are formed in contact with the source and drain regions so as to expose a part of the source and drain regions.