Patent classifications
G03F7/70655
SEMICONDUCTOR EXPOSURE METHOD AND SEMICONDUCTOR EXPOSURE SYSTEM FOR PERFORMING THE SEMICONDUCTOR EXPOSURE METHOD
A semiconductor exposure method may include forming a pattern on a wafer using a light source in a semiconductor exposure equipment, collecting a pattern image of the pattern to be analyzed, deriving a pixel histogram of the pattern image, and using the pixel histogram to calculate a dark or white value (DW value) of the pattern image, and comparing the DW value of the pattern image with reference focus information to determine whether an outlier has occurred in the pattern to be analyzed due to defocusing of the laser light.
SIMULATION-ASSISTED METHODS AND SOFTWARE TO GUIDE SELECTION OF PATTERNS OR GAUGES FOR LITHOGRAPHIC PROCESSES
Methods, computer programs, and systems are disclosed, with one method including characterizing a depth variation of a predicted result within a feature of a pattern from a lithography simulation. The method evaluates the depth variation characterization and selects patterns or gauges based on the depth variation evaluation. In some embodiments, the evaluating can be based on an aerial image (AI) depth sensitivity having the depth variation.