A metrology target may include a first rotationally symmetric working zone with one or more instances of a first pattern and a second rotationally-symmetric working zone with one or more instances of a second pattern, where at least one of the first pattern or the second pattern is a Moiré pattern formed from a first grating structure with a first pitch along a measurement direction on a first sample layer and a second grating structure with a second pitch different than the first pitch along the measurement direction on a second sample layer. Centers of rotational symmetry of the first and second working zones may overlap by design when an overlay error between the first sample layer and the second layer is zero. A difference between the centers of rotational symmetry of the first and second working zones may indicate an overlay error between the first and second sample layers.

A method of processing a wafer is provided. The method includes providing a reference pattern for patterning a wafer. The reference pattern is independent of a working surface of the wafer. A placement of a first pattern on the working surface of the wafer is determined by identifying the reference pattern to align the first pattern. The first pattern is formed on the working surface of the wafer based on the placement.

An overlay pattern includes a light-transmitting region and a first light-proof region. The first light-proof region and the light-transmitting region are arranged on a same plane, and an area of the first light-proof region is larger than an area of the light-transmitting region. An orthographic projection of the first light-proof region on the plane and an orthographic projection of the light-transmitting region on the plane do not overlap and form a first rectangular region.

An overlay error measurement structure includes a lower-layer pattern disposed over a substrate, and an upper-layer pattern disposed over the lower-layer pattern and at least partially overlapping with the lower-layer pattern. The lower-layer pattern includes a plurality of first sub-patterns extending in a first direction and being arranged in a second direction crossing the first direction. The upper-layer pattern includes a plurality of second sub-patterns extending in the first direction and being arranged in the second direction. At least one of a pattern pitch and a pattern width of at least one of at least a part of the first sub-patterns and at least a part of the second sub-patterns varies along the second direction.

A lithographic apparatus having a first outlet to provide a thermally conditioned fluid with a first flow characteristic to at least part of a sensor beam path, and a second outlet associated with the first outlet and to provide a thermally conditioned fluid with a second flow characteristic, different to the first flow characteristic, adjacent the thermally conditioned fluid from the first outlet.

Metrology methods, systems and targets are provided, which implement a side by side paradigm. Adjacent cells with periodic structures are used to extract the overlay error, e.g., by introducing controllable phase shifts or image shifts which enable algorithmic computation of the overlay. The periodic structures are designed to exhibit a rotational symmetry to support the computation and reduce errors.

Scatterometry overlay (SCOL) targets as well as design, production and measurement methods thereof are provided. The SCOL targets have several periodic structures at different measurement directions which share some of their structural target elements or parts thereof. An array of common elements may have symmetry directions which are parallel to the measurement directions and thus enable compacting the targets or alternatively increasing the area use efficiency of the targets. Various configurations enable high flexibility in arranging the number of layers in the target and measurement directions, and carrying out respective overlay measurements among the layers.

A diffraction measurement target that has at least a first sub-target and at least a second sub-target, and wherein (1) the first and second sub-targets each include a pair of periodic structures and the first sub-target has a different design than the second sub-target, the different design including the first sub-target periodic structures having a different pitch, feature width, space width, and/or segmentation than the second sub-target periodic structure or (2) the first and second sub-targets respectively include a first and second periodic structure in a first layer, and a third periodic structure is located at least partly underneath the first periodic structure in a second layer under the first layer and there being no periodic structure underneath the second periodic structure in the second layer, and a fourth periodic structure is located at least partly underneath the second periodic structure in a third layer under the second layer.

A method of making a semiconductor device is provided for depositing, patterning, and developing photoresist (1703, 1704) on an underlying layer located on a backside of a wafer having a frontside on which an integrated circuit die are formed over a shared wafer semiconductor substrate and arranged in a grid, thereby forming a patterned photoresist mask with a unique set of one or more openings which are used to selectively etch the underlying layer to form, on each integrated circuit die, a unique die mark identifier pattern of etched openings in the underlying layer corresponding to the unique set of one or more openings in the patterned photoresist mask (1705), where the patterned photoresist mask is removed (1706) from the backside of the wafer before singulating the wafer to form a plurality of integrated circuit devices (1708) which each include a unique die marking.

A lithographic process is used to form a plurality of target structures (T) on a substrate (W). Each target structure comprises overlaid gratings each having a specific overlay bias. Asymmetry (A) of each grating, measured by scatterometry, includes contributions due to (i) the overlay bias, (ii) an overlay error (OV) in the lithographic process and (iii) bottom grating asymmetry within the overlaid gratings. Asymmetry measurements are obtained for three or more target structures having three or more different values of overlay bias (e.g., −d, 0, +d). Knowing the three different overlay bias values and a theoretical curve relationship between overlay error and asymmetry, overlay error (OV) can be calculated while correcting the effect of bottom grating asymmetry. Bias schemes with three and four different biases are disclosed as examples. Gratings with different directions and biases can be interleaved in a composite target structure.