A metrology system includes a radiation source (708), a phased array (722a,b;724a,b;726;734), a detector, and a comparator. The phased array includes optical elements (706), waveguides (704), and phase modulators (702). The phased array generates a beam of radiation and directs the beam toward a surface of an object. The optical elements radiate radiation waves. The waveguides guide radiation from the radiation source to the optical elements. The phase modulators adjust phases of the radiation waves such that the radiation waves combine to form the beam. The detector receives radiation scattered from the surface and generates a detection signal based on the received radiation. The comparator analyzes the detection signal and determines a location of a defect on the surface based on the analyzing.

Generating a design (e.g., a metrology mark or a device pattern to be printed on a substrate) that is optimized for aberration sensitivity related to an optical system of a lithography system. A metrology mark (e.g., a transmission image sensor (TIS) mark) is optimized for a given device pattern by matching the aberration sensitivity of the metrology mark with the aberration sensitivity of the device pattern. A cost function that includes the aberration sensitivity difference between the metrology mark and the device pattern is evaluated based on an imaging characteristic response (e.g., a critical dimension (CD) response to focus) obtained from a simulation model that simulates lithography. The cost function is evaluated by modifying the metrology mark until the cost function is minimized and an optimized metrology mark is output when the cost function is minimized.

A measuring method for measuring an overlay shift between two wafers, comprising: providing a previous wafer layer, a to-be-measured wafer layer and a measuring circuit layer, wherein each of the previous wafer layer and the to-be-measured wafer layer comprises a first group of dies; measuring, by a plurality of probes of the measuring circuit layer, the first group of dies of the to-be-measured wafer layer; generating a measurement result according to at least the measuring to the first group of dies; and comparing the measurement result with a standard data to determine the overlay shift between the previous wafer layer and the to-be-measured wafer layer, wherein the to-be-measured wafer layer is between the previous wafer layer and the measuring circuit layer and is connected to the previous wafer layer and the measuring circuit layer.

Disclosed are a method and system for overlay error compensation and a storage medium. The method includes that N wafer groups are provided, wherein each wafer group includes M wafers each including a present and previous layer, and N and M are positive integers greater than or equal to 2; for each wafer, a first overlay error is determined according to device structures of the present and previous layers, and a photoetching compensation value is calculated according to the first overlay error; for each wafer group, a first average compensation value is calculated according to photoetching compensation values; a second average compensation value of the N wafer groups is calculated according to first average compensation values; and in response to that the second average compensation value is within a preset range, the second average compensation value is fed to a batch control system to compensate an (N+1).sup.th wafer group.

A method and associated computer program and apparatuses for determining a correction for at least one control parameter, the at least one control parameter for controlling a semiconductor manufacturing process so as to manufacture semiconductor devices on a substrate. The method includes: obtaining metrology data relating to the semiconductor manufacturing process or at least part thereof; obtaining associated data relating to the semiconductor manufacturing process or at least part thereof, the associated data providing information for interpreting the metrology data; and determining the correction based on the metrology data and the associated data, wherein the determining is such that the determined correction depends on a degree to which a trend and/or event in the metrology data should be corrected based on the interpretation of the metrology data.

An overlay mark forming a Moire pattern, an overlay measurement method using the overlay mark, an overlay measurement apparatus using the overlay mark, and a manufacturing method of a semiconductor device using the overlay mark are provided. The overlay mark for measuring an overlay based on an image is configured to determine a relative misalignment between at least two pattern layers. The overlay mark includes a first overlay mark including a pair of first grating patterns which has a first pitch along a first direction and which is rotationally symmetrical by 180 degrees, and includes a second overlay mark including a pair of second grating patterns and a pair of third grating patterns. The second grating patterns partially overlap the first grating patterns and are rotationally symmetrical by 180 degrees, and the third grating patterns partially overlap the first grating patterns and are rotationally symmetrical by 180 degrees.

A method may include receiving time-varying interference signals from two or more photodetectors associated with a grating structure and a reference grating structure. The grating structure may include one or more diffraction gratings, where the reference grating structure includes a reference grating arranged next to the one or more diffraction gratings of the grating structure and where the one or more illumination beams simultaneously interact with grating structure and the reference grating structure as the sample is scanned relative to the illumination beam. The method may include determining at least one of a real-time position or a scanning velocity of the grating structure during the scan based on the reference grating signal. The method may include determining one or more overlay errors based on the grating signals from the grating structure and the real-time position of the grating structure during the scan determined based on the reference grating signal.

In a lithographic process, product units such as semiconductor wafers are subjected to lithographic patterning operations and chemical and physical processing operations. Alignment data or other measurements are made at stages during the performance of the process to obtain object data representing positional deviation or other parameters measured at points spatially distributed across each unit. This object data is used to obtain diagnostic information by performing a multivariate analysis to decompose a set of vectors representing the units in said multidimensional space into one or more component vectors. Diagnostic information about the industrial process is extracted using the component vectors. The performance of the industrial process for subsequent product units can be controlled based on the extracted diagnostic information.

Tracking and/or predicting the yield of a semiconductor process. In an embodiment, a tracking method monitors the yield at each layer of the process. This can be used to determine how to proceed. In an embodiment, the prediction method measures the values of at least one attribute of each conductive via on a substrate before the lithography process. The measured values are then compared to predefined values for the same attribute, to determine any deviation. Based on this comparison, an overlay yield of the lithography process is predicted.

In a lithographic process, product units such as semiconductor wafers are subjected to lithographic patterning operations and chemical and physical processing operations. Alignment data or other measurements are made at stages during the performance of the process to obtain object data representing positional deviation or other parameters measured at points spatially distributed across each unit. This object data is used to obtain diagnostic information by performing a multivariate analysis to decompose a set of vectors representing the units in said multidimensional space into one or more component vectors. Diagnostic information about the industrial process is extracted using the component vectors. The performance of the industrial process for subsequent product units can be controlled based on the extracted diagnostic information.