Patent classifications
G05F1/585
Method and system for electro-absorption modulator drivers in CMOS
Methods and systems for electro-absorption modulator drivers in CMOS may comprise an electro-absorption modulator optically coupled to a laser source and electrically coupled to a modulator driver circuit that is in a complementary metal oxide semiconductor (CMOS) chip. The electro-absorption modulator includes a summer for receiving a negative bias voltage and a programmable offset voltage, a voltage regulator for receiving the output of the summer and generating a negative DC voltage of lower magnitude than the negative bias voltage, level shifting circuitry for shifting a received data signal to a DC voltage level between the negative DC voltage from the voltage regulator and the negative bias voltage, and an electrical coupling structure for DC-coupling the level shifted data signal to the modulator. The bias voltage may be received from an off-chip low drop out (LDO) voltage regulator. The level shifting circuitry may include cascode CMOS transistors and a current mirror.
Power transmission system including power transmitter and power receiver
A power transmission system includes: a power transmitter connected to a power supply; a plurality of power receivers respectively connected to a plurality of loads; a power transmission line connecting the power transmitter and the plurality of power receivers; and a controller. The controller acquires information on optimum power for maximizing transmission efficiency in the power transmission line and information on power demands requested by the loads, and routes transmission power from the power transmitter selectively to the plurality of power receivers. The transmission power is equal to or smaller than the optimum power. When a total power demand is larger than the optimum power, the controller requests another controller to supply supplementary power. When the total power demand is smaller than the optimum power, the controller notifies the other controller that surplus power is available.
Method And System For Electro-Absorption Modulator Drivers In CMOS
Methods and systems for electro-absorption modulator drivers in CMOS may comprise an electro-absorption modulator optically coupled to a laser source and electrically coupled to a modulator driver circuit that is in a complementary metal oxide semiconductor (CMOS) chip. The electro-absorption modulator includes a summer for receiving a negative bias voltage and a programmable offset voltage, a voltage regulator for receiving the output of the summer and generating a negative DC voltage of lower magnitude than the negative bias voltage, level shifting circuitry for shifting a received data signal to a DC voltage level between the negative DC voltage from the voltage regulator and the negative bias voltage, and an electrical coupling structure for DC-coupling the level shifted data signal to the modulator. The bias voltage may be received from an off-chip low drop out (LDO) voltage regulator. The level shifting circuitry may include cascode CMOS transistors and a current mirror.
Method And System For Electro-Absorption Modulator Drivers In CMOS
Methods and systems for electro-absorption modulator drivers in CMOS may comprise an electro-absorption modulator optically coupled to a laser source and electrically coupled to a modulator driver circuit that is in a complementary metal oxide semiconductor (CMOS) chip. The electro-absorption modulator includes a summer for receiving a negative bias voltage and a programmable offset voltage, a voltage regulator for receiving the output of the summer and generating a negative DC voltage of lower magnitude than the negative bias voltage, level shifting circuitry for shifting a received data signal to a DC voltage level between the negative DC voltage from the voltage regulator and the negative bias voltage, and an electrical coupling structure for DC-coupling the level shifted data signal to the modulator. The bias voltage may be received from an off-chip low drop out (LDO) voltage regulator. The level shifting circuitry may include cascode CMOS transistors and a current mirror.
Low dropout regulator with thin pass device
Systems, methods and apparatus for efficient control and biasing of pass devices that include at least one thin pass device and a remaining of thick pass devices. When operated at extreme high and low voltages, the at least one thin pass device maintains operation in its saturation region of operation while the remaining pass devices may be driven into their triode regions of operation. The thin and thick pass devices are arranged in a cascode configuration that includes a plurality of stacked devices. Biasing of the thin and thick cascode devices can be according to a voltage division scheme which protects the devices when the voltage across the stack is high, and provides a skewed voltage division across the stacked devices that promotes a higher gate-to-source voltage of the thick pass devices for a lower R.sub.ON. In one exemplary case, gate length of the at least one thin pass device may be reduced to provide a lower gate-to-source voltage of the thin pass device during operation in the saturation region. An exemplary implementation of an LDO controlling the pass devices for providing RF power to a power amplifier is described.
Low dropout regulator with thin pass device
Systems, methods and apparatus for efficient control and biasing of pass devices that include at least one thin pass device and a remaining of thick pass devices. When operated at extreme high and low voltages, the at least one thin pass device maintains operation in its saturation region of operation while the remaining pass devices may be driven into their triode regions of operation. The thin and thick pass devices are arranged in a cascode configuration that includes a plurality of stacked devices. Biasing of the thin and thick cascode devices can be according to a voltage division scheme which protects the devices when the voltage across the stack is high, and provides a skewed voltage division across the stacked devices that promotes a higher gate-to-source voltage of the thick pass devices for a lower R.sub.ON. In one exemplary case, gate length of the at least one thin pass device may be reduced to provide a lower gate-to-source voltage of the thin pass device during operation in the saturation region. An exemplary implementation of an LDO controlling the pass devices for providing RF power to a power amplifier is described.
REFERENCE VOLTAGE GENERATION CIRCUIT
A reference voltage generation circuit includes an output terminal that outputs a reference voltage; first and second bipolar transistors connected between first and second power supply terminals, bases of the first and second bipolar transistors being connected to the output terminal; a first resistor connected between the second power supply terminal and the first bipolar transistor; a second resistor connected in series between the first resistor and the second bipolar transistor; a third resistor connected between the first power supply terminal and the first bipolar transistor; a fourth resistor connected between the first power supply terminal and the second bipolar transistor; an amplifier using the collectors of the first and second bipolar transistors as input, an output of the amplifier being connected to the output terminal; and a temperature compensation circuit that corrects a current of the collector or emitter of the second bipolar transistor or the first bipolar transistor.
REFERENCE VOLTAGE GENERATION CIRCUIT
A reference voltage generation circuit includes an output terminal that outputs a reference voltage; first and second bipolar transistors connected between first and second power supply terminals, bases of the first and second bipolar transistors being connected to the output terminal; a first resistor connected between the second power supply terminal and the first bipolar transistor; a second resistor connected in series between the first resistor and the second bipolar transistor; a third resistor connected between the first power supply terminal and the first bipolar transistor; a fourth resistor connected between the first power supply terminal and the second bipolar transistor; an amplifier using the collectors of the first and second bipolar transistors as input, an output of the amplifier being connected to the output terminal; and a temperature compensation circuit that corrects a current of the collector or emitter of the second bipolar transistor or the first bipolar transistor.