Disclosed are a TWS earphone, a method and apparatus for reducing earphone energy consumption, and a computer-readable storage medium. The method for reducing earphone energy consumption comprises: determining whether a target earphone is in an off-ear state and is not placed in a charging case; if so, acquiring a timekeeping duration since the target earphone is taken off of an ear; determining whether the timekeeping duration exceeds a first preset threshold value; and if the timekeeping duration exceeds the first preset threshold value, performing energy consumption reduction processing on the earphone. According to the present application, the duration since an earphone is taken off of an ear is evaluated for the earphone that is taken off of the ear and is not placed in a charging case, so as to perform energy consumption reduction processing on the earphone that has been taken off of the ear for a relatively long duration, such that unnecessary power consumption of the earphone when same is in a not-in-use state can be effectively reduced, and the effective service time of the earphone after charging is prolonged.

A network-based control method for power consumption of an application, a terminal device and a non-transitory computer-readable storage medium are disclosed. The network-based control method may include: identifying a target application having a frequent wakeup or heartbeat detection behavior in response to a freezing function being enabled; monitoring whether a peer server to which the target application is connected is accessible; and freezing the target application by the freezing function in response to the peer server being inaccessible.

A network-based control method for power consumption of an application, a terminal device and a non-transitory computer-readable storage medium are disclosed. The network-based control method may include: identifying a target application having a frequent wakeup or heartbeat detection behavior in response to a freezing function being enabled; monitoring whether a peer server to which the target application is connected is accessible; and freezing the target application by the freezing function in response to the peer server being inaccessible.

Techniques for employing a decentralized sleep management service are described herein. In some instances, each computing device of a group of computing devices periodically shares information about itself with each other computing device of the group. With this information, each computing device within the group that is awake and capable of managing other devices selects a subset of devices to probe. The devices then probe this subset to determine whether the probed devices are asleep. In response to identifying a sleeping device, the probing device takes over management of the sleeping device. Managing the sleeping device involves informing other devices of the group that the sleeping device is being managed, in addition to monitoring requests for services on the sleeping device. In response to receiving a valid request for a service hosted by the sleeping device, the managing device awakens the sleeping device and ceases managing the now-woken device.

Techniques for employing a decentralized sleep management service are described herein. In some instances, each computing device of a group of computing devices periodically shares information about itself with each other computing device of the group. With this information, each computing device within the group that is awake and capable of managing other devices selects a subset of devices to probe. The devices then probe this subset to determine whether the probed devices are asleep. In response to identifying a sleeping device, the probing device takes over management of the sleeping device. Managing the sleeping device involves informing other devices of the group that the sleeping device is being managed, in addition to monitoring requests for services on the sleeping device. In response to receiving a valid request for a service hosted by the sleeping device, the managing device awakens the sleeping device and ceases managing the now-woken device.

An image forming apparatus includes a user interface device, an image forming operation unit, a detection sensor having a two-dimensional structure including a plurality of sensor columns of sensors, a power supply to supply power to the user interface device and the image forming operation unit according to power modes including a sleep mode and a standby mode, in which the power supply is to supply more power in the standby mode than in the sleep mode, and a controller. The controller is to switch a power mode from the sleep mode to the stand-by mode, when a first condition is satisfied based on sensor data detected by the sensor columns, the first condition being a condition in which results of calculations performed on data, of the sensor data, corresponding to consecutive sensor columns among the plurality of sensor columns are each equal to or greater than a threshold value simultaneously for a period of time, to indicate detection of a human body, and to control the power supply to supply power corresponding to the switched power mode to the user interface device and the image forming operation unit.

Closed loop performance controllers of asymmetric multiprocessor systems may be configured and operated to improve performance and power efficiency of such systems by adjusting control effort parameters that determine the dynamic voltage and frequency state of the processors and coprocessors of the system in response to the workload. One example of such an arrangement includes applying hysteresis to the control effort parameter and/or seeding the control effort parameter so that the processor or coprocessor receives a returning workload in a higher performance state. Another example of such an arrangement includes deadline driven control, in which the control effort parameter for one or more processing agents may be increased in response to deadlines not being met for a workload and/or decreased in response to deadlines being met too far in advance. The performance increase/decrease may be determined by comparison of various performance metrics for each of the processing agents.

Closed loop performance controllers of asymmetric multiprocessor systems may be configured and operated to improve performance and power efficiency of such systems by adjusting control effort parameters that determine the dynamic voltage and frequency state of the processors and coprocessors of the system in response to the workload. One example of such an arrangement includes applying hysteresis to the control effort parameter and/or seeding the control effort parameter so that the processor or coprocessor receives a returning workload in a higher performance state. Another example of such an arrangement includes deadline driven control, in which the control effort parameter for one or more processing agents may be increased in response to deadlines not being met for a workload and/or decreased in response to deadlines being met too far in advance. The performance increase/decrease may be determined by comparison of various performance metrics for each of the processing agents.

Systems and methods related to controlling clock signals for clocking shader engines modules (SEs) and non-shader-engine modules (nSEs) of a graphics processing unit (GPU) are provided. One or more dividers receive a clock signal CLK and output a clock signal CLKA to the SEs and output a clock signal CLKB to the nSEs. The frequencies of CLKA and CLKB are independently selected based on sets of performance counter data monitored at the SEs and nSEs, respectively. The clock signal frequency for either the SEs or the nSEs is reduced when the corresponding sets of performance counter data indicates a comparatively lower processing workload for the SEs or for the nSEs.

A computing system for adjusting voltage regulation including a main processing module, a secondary processing module that executes requested computation tasks, and a voltage regulation module connected to the secondary processing module that regulates its output voltage according to a regulation law depending on at least one regulation parameter. The system also includes a first digital bus (that transfers requested computation tasks from the main processing module to the secondary processing module and transfers results of the requested computation tasks from the secondary processing module to the main processing module. The system also includes a second digital bus that transfers regulation parameters from the main processing module to the voltage regulation module.