A power regulation and control method, apparatus and device, and a readable storage medium. The method disclosed in the present application includes: in response to a node power value of an artificial intelligence (AI) computing node being greater than a warning power value, acquiring, by a baseboard management controller (BMC), chip power values of computing chips in the AI computing node; obtaining a grouping result by grouping, according to the chip power values of the computing chips, the computing chips; and in response to the node power value being greater than a power capping value, querying a power regulation and control policy corresponding to the grouping result, and regulating power limit values of the computing chips according to the power regulation and control policy, such that a sum of all the power limit values is in a target range, where the warning power value is less than the power capping value, the power regulation and control policy is preset on the basis of the target range, and the target range is used for regulating and controlling energy efficiency values of the computing chips in the AI computing node.

Exemplary embodiments provide thermal wear spreading among a plurality of thermal die regions in an integrated circuit or among dies by using die region wear-out data that represents a cumulative amount of time each of a number of thermal die regions in one or more dies has spent at a particular temperature level. In one example, die region wear-out data is stored in persistent memory and is accrued over a life of each respective thermal region so that a long term monitoring of temperature levels in the various die regions is used to spread thermal wear among the thermal die regions. In one example, spreading thermal wear is done by controlling task execution such as thread execution among one or more processing cores, dies and/or data access operations for a memory.

A control method includes obtaining a control instruction, and in response to an electronic device being in a first state, triggering the electronic device to switch from the first state to a second state, and updating a parameter of a target member from a corresponding parameter in a first operation state to a corresponding parameter in a second operation state during switching the electronic device from the first state to the second state. The control instruction is configured to instruct to switch the target member of the electronic device from the first operation state to the second operation state. A frequency of the target member in the first operation state is different from a frequency of the target member in the second operation state. A power consumption of the electronic device in the first state is lower than a power consumption of the electronic device in the second state.

A power-subsystem-monitoring-based computing system includes a power subsystem coupled to a first computing component. A throttling engine throttles the first computing component when the power subsystem exceeds its maximum power consumption, and de-throttles the first computing component when the power subsystem no longer exceeds its maximum power consumption. The throttling engine also throttles the first computing component when the power subsystem exceeds its rated power consumption for a first time period, and de-throttles the first computing component when the power subsystem no longer exceeds its rated power consumption. The throttling engine also reduces the operating capabilities of the first computing component when throttling has been performed for more than a second time period, and increases the operating capabilities of the first computing component when the throttling has been performed for less than the second time period and the first computing component is operating below its desired operating capability.

A storage controller includes a plurality of pipeline stages configured to process data. A system clock signal is received that has a system frequency and at least one performance metric is determined for one or more pipeline stages of the plurality of pipeline stages. A first clock signal is generated having a first frequency for operation of a first pipeline stage of the plurality of pipeline stages. Based at least in part on the at least one determined performance metric, a second clock signal is generated having a second frequency for operation of a second pipeline stage of the plurality of pipeline stages. The second frequency is less than the system frequency and may also differ from the first frequency.

A storage controller includes a plurality of pipeline stages configured to process data. A system clock signal is received that has a system frequency and at least one performance metric is determined for one or more pipeline stages of the plurality of pipeline stages. A first clock signal is generated having a first frequency for operation of a first pipeline stage of the plurality of pipeline stages. Based at least in part on the at least one determined performance metric, a second clock signal is generated having a second frequency for operation of a second pipeline stage of the plurality of pipeline stages. The second frequency is less than the system frequency and may also differ from the first frequency.

A computer-implemented method of controlling power consumption in a multi-processor computing device comprises: determining whether a first processor is operating in a high-power regime or a low-power regime; selecting a first set of control rules that includes a first subset of control rules that apply when the first processor is operating in the high-power regime and a second subset of control rules that apply when the first processor is operating in the low-power regime; determining one or more power settings for the first processor based on the first set of control rules; and causing the first processor to perform one or more operations based on the one or more power settings.

A system for dynamically scaling a service is configured to receive usage data of a computing system infrastructure. The usage data includes historical usage data and current usage data. The system is further configured to train a machine learning model using the historical usage data, such that the machine learning model receives, as input, the current usage data and provides, as output, a status of the computing system infrastructure. Based at least in part on the status of the computing system infrastructure, the system is further configured to change a configuration of the computing system infrastructure by adjusting a frequency of a central processing unit (CPU).

A system for dynamically scaling a service is configured to receive usage data of a computing system infrastructure. The usage data includes historical usage data and current usage data. The system is further configured to train a machine learning model using the historical usage data, such that the machine learning model receives, as input, the current usage data and provides, as output, a status of the computing system infrastructure. Based at least in part on the status of the computing system infrastructure, the system is further configured to change a configuration of the computing system infrastructure by adjusting a frequency of a central processing unit (CPU).

Processor core power management in a virtualized environment. A hypervisor, executing on a processor device of a computing host, the processor device having a plurality of processor cores, receives from a guest operating system of a virtual machine, a request to set a virtual central processing unit (VCPU) of the virtual machine to a first requested P-state level of a plurality of P-state levels. Based on the request, the hypervisor associates the VCPU with a first processor core having a P-state that corresponds to the first requested P-state level.