A storage system has a first memory, and a second memory that includes storage memory. The storage system has a processing device. The processing device is to select whether to write data to the first memory and write the data from the first memory to the second memory, or to write the data to the second memory bypassing the first memory. The processing device is to write portions of data for storage according to such selection.

A method for inline block-level deduplication is provided. The method generally includes receiving an input/output (I/O) to write a first data block in storage as associated with an logical block address (LBA), hashing the first data block to a first hash, determining a match for the first hash is contained in a bloom filter based on set bits in the bloom filter for the first hash, determining an entry for the first data block is contained in a deduplication hash table based on a subset of bits of the first hash, locating a first middle map extent in a middle map based on a middle block address (MBA) included in the entry, verifying the first hash matches the first hash stored in the middle map extent, adding a logical map extent for the LBA to a logical map, wherein the logical map extent maps the LBA to the MBA.

Systems, apparatuses, and methods related to media management, including “garbage collection,” in memory or storage systems or sub-systems, such as solid state drives, are described. For example, a criticality value can be determined and used as a basis for managing a garbage collection operation on a data block. A controller or the system or sub-system may determine that a criticality value associated with performing a garbage collection operation satisfies a condition. Based on determining that the condition is satisfied, a parameter associated with performing the garbage collection operation can be adjusted. The garbage collection operation is performed on the data block stored on the memory component using the adjusted parameter.

According to one embodiment, when a command executed in a nonvolatile memory is an erase/program command and when a cumulative weight value satisfies a condition that a first input is selected as an input of high priority, a memory system suspends execution of the erase/program command by transmitting a suspend command to the nonvolatile memory. The memory system repeats executing an operation of starting the execution of one read command of the first input and an operation of updating the cumulative weight by using the weight associated with the read command until read command no longer exists in the first input or until the condition that the cumulative weight is larger than the first value is not satisfied, and resumes the execution of the suspended erase/program command.

A common storage management device for a system including a common storage and at least one computer includes at least one processor, the at least one computer storing a plurality of applications configured to write and read data in the common storage. The at least one processor is configured to manage a reservation and a release of a storage space of the common storage in response to a request from the plurality of applications. The at least one processor is configured to assign a releasing priority to each storage space of the common storage that is reserved. The at least one processor is configured to instruct to release the storage space with highest releasing priority when the plurality of applications request to reserve the storage space for the data and free storage space is insufficient for reserving the storage space for the data.

Aspects of the present disclosure relate to data deduplication (dedup) techniques for storage arrays. At least one input/output (IO) operations in an IO workload received by a storage array can be identified. Each of the IOs can relate to a data track of the storage array. a probability of the at least one IO being similar to a previous stored IO can be determined. A data deduplication (dedup) operation can be performed on the at least one IO based on the probability. The probability can be less than one hundred percent (100%).

A multi-namespace storage device includes a nonvolatile memory which includes a first memory block and a second memory block different from the first memory block, and a memory controller which receives, from a host, a command for requesting creation of a first namespace including a first logical block number and a second namespace including a second logical page number not included in the first logical block number and receives a physical mapping command for instructing physical mapping of the first namespace. The memory controller performs a first mapping operation by mapping the first logical block number to the first memory block and performs a second mapping operation by mapping the second logical page number to a second memory page included in the second memory block in response to the physical mapping command.

Systems and methods for modifying a usage limit of a data storage device include a host interface; integrated circuit memory cells; and a processing device coupled to the host interface to provide commands with addresses to access the integrated circuit memory cells according to the address, and configured to execute firmware to perform: operations requested by commands received via the host interface; and updates to a usage limit of the data storage device.

Storage devices include a memory array comprised of a plurality of memory devices. These memory devices are programmed to store data and erased when data is invalidated. Traditional storage devices waited to erase memory devices until new data was ready to write to them in order to avoid baking in the erase state. However, the act of erasing adds time to the overall program cycle and is getting larger as storage device capacity and complexity increases. Because of newer configurations, the threat of baking in erase states is decreased, allowing memory devices within a memory array to be pre-erased prior to writing. This reduces write times and be dynamically implemented in response to one or more changing conditions. Pre-erasing can be accomplished by utilizing a pre-erase list that can indicate pre-erased memory devices and provide them in response to a write command prior to the use of non-erased memory devices.

A memory system includes a plurality of memory devices and a controller, wherein each of the plurality of memory devices includes zone blocks. The controller is configured to evenly distribute open zone blocks within the memory devices by referring to an activated zone block count table and a full zone block count table. The activated zone block count table includes an activated zone block count of each of the memory devices, and the full zone block count table includes a full zone block count of each of the memory devices.